Struct esp32s3::usb_wrap::otg_conf::W

pub struct W(_);

Register OTG_CONF writer

Implementations

impl W

pub fn srp_sessend_override(&mut self) -> SRP_SESSEND_OVERRIDE_W<'_, 0>

Bit 0 - This bit is used to enable the software over-ride of srp session end signal. 1’b0: the signal is controlled by the chip input. 1’b1: the signal is controlled by the software.

pub fn srp_sessend_value(&mut self) -> SRP_SESSEND_VALUE_W<'_, 1>

Bit 1 - Software over-ride value of srp session end signal.

pub fn phy_sel(&mut self) -> PHY_SEL_W<'_, 2>

Bit 2 - Select internal external PHY. 1’b0: Select internal PHY. 1’b1: Select external PHY.

pub fn dfifo_force_pd(&mut self) -> DFIFO_FORCE_PD_W<'_, 3>

Bit 3 - Force the dfifo to go into low power mode. The data in dfifo will not lost.

pub fn dbnce_fltr_bypass(&mut self) -> DBNCE_FLTR_BYPASS_W<'_, 4>

Bit 4 - Bypass Debounce filters for avalid,bvalid,vbusvalid,session end, id signals

pub fn exchg_pins_override(&mut self) -> EXCHG_PINS_OVERRIDE_W<'_, 5>

Bit 5 - Enable software controlle USB D+ D- exchange

pub fn exchg_pins(&mut self) -> EXCHG_PINS_W<'_, 6>

Bit 6 - USB D+ D- exchange. 1’b0: don’t change. 1’b1: exchange D+ D-

pub fn vrefh(&mut self) -> VREFH_W<'_, 7>

Bits 7:8 - Control single-end input high threshold,1.76V to 2V, step 80mV

pub fn vrefl(&mut self) -> VREFL_W<'_, 9>

Bits 9:10 - Control single-end input low threshold,0.8V to 1.04V, step 80mV

pub fn vref_override(&mut self) -> VREF_OVERRIDE_W<'_, 11>

Bit 11 - Enable software controlle input threshold

pub fn pad_pull_override(&mut self) -> PAD_PULL_OVERRIDE_W<'_, 12>

Bit 12 - Enable software controlle USB D+ D- pullup pulldown

pub fn dp_pullup(&mut self) -> DP_PULLUP_W<'_, 13>

Bit 13 - Controlle USB D+ pullup

pub fn dp_pulldown(&mut self) -> DP_PULLDOWN_W<'_, 14>

Bit 14 - Controlle USB D+ pulldown

pub fn dm_pullup(&mut self) -> DM_PULLUP_W<'_, 15>

Bit 15 - Controlle USB D+ pullup

pub fn dm_pulldown(&mut self) -> DM_PULLDOWN_W<'_, 16>

Bit 16 - Controlle USB D+ pulldown

pub fn pullup_value(&mut self) -> PULLUP_VALUE_W<'_, 17>

Bit 17 - Controlle pullup value. 1’b0: typical value is 2.4K. 1’b1: typical value is 1.2K.

pub fn usb_pad_enable(&mut self) -> USB_PAD_ENABLE_W<'_, 18>

Bit 18 - Enable USB pad function

pub fn ahb_clk_force_on(&mut self) -> AHB_CLK_FORCE_ON_W<'_, 19>

Bit 19 - Force ahb clock always on

pub fn phy_clk_force_on(&mut self) -> PHY_CLK_FORCE_ON_W<'_, 20>

Bit 20 - Force phy clock always on

pub fn phy_tx_edge_sel(&mut self) -> PHY_TX_EDGE_SEL_W<'_, 21>

Bit 21 - Select phy tx signal output clock edge. 1’b0: negedge. 1’b1: posedge.

pub fn dfifo_force_pu(&mut self) -> DFIFO_FORCE_PU_W<'_, 22>

Bit 22 - Disable the dfifo to go into low power mode. The data in dfifo will not lost.

pub fn clk_en(&mut self) -> CLK_EN_W<'_, 31>

Bit 31 - Disable auto clock gating of CSR registers

pub unsafe fn bits(&mut self, bits: u32) -> &mut Self

Writes raw bits to the register.

Methods from Deref<Target = W<OTG_CONF_SPEC>>

pub unsafe fn bits(&mut self, bits: REG::Ux) -> &mut Self

Writes raw bits to the register.

Safety

Read datasheet or reference manual to find what values are allowed to pass.

Trait Implementations

impl Deref for W

type Target = W<OTG_CONF_SPEC>

The resulting type after dereferencing.

fn deref(&self) -> &Self::Target

Dereferences the value.

impl DerefMut for W

fn deref_mut(&mut self) -> &mut Self::Target

Mutably dereferences the value.

impl From<W<OTG_CONF_SPEC>> for W

fn from(writer: W<OTG_CONF_SPEC>) -> Self

Converts to this type from the input type.