Struct esp32s3::sensitive::core_0_pif_pms_constrain_13::R   
source · pub struct R(_);Expand description
Register CORE_0_PIF_PMS_CONSTRAIN_13 reader
Implementations§
source§impl R
 
impl R
sourcepub fn core_0_pif_pms_constrain_rtcslow_1_spltaddr_world_0(
    &self
) -> CORE_0_PIF_PMS_CONSTRAIN_RTCSLOW_1_SPLTADDR_WORLD_0_R
 
pub fn core_0_pif_pms_constrain_rtcslow_1_spltaddr_world_0( &self ) -> CORE_0_PIF_PMS_CONSTRAIN_RTCSLOW_1_SPLTADDR_WORLD_0_R
Bits 0:10 - RTCSlow_1 memory split address in world 0 for core0.
sourcepub fn core_0_pif_pms_constrain_rtcslow_1_spltaddr_world_1(
    &self
) -> CORE_0_PIF_PMS_CONSTRAIN_RTCSLOW_1_SPLTADDR_WORLD_1_R
 
pub fn core_0_pif_pms_constrain_rtcslow_1_spltaddr_world_1( &self ) -> CORE_0_PIF_PMS_CONSTRAIN_RTCSLOW_1_SPLTADDR_WORLD_1_R
Bits 11:21 - RTCSlow_1 memory split address in world 1 for core0.