Struct esp32s3::sensitive::core_0_pif_pms_monitor_1::R
source · pub struct R(_);Expand description
Register CORE_0_PIF_PMS_MONITOR_1 reader
Implementations§
source§impl R
impl R
sourcepub fn core_0_pif_pms_monitor_violate_clr(
&self
) -> CORE_0_PIF_PMS_MONITOR_VIOLATE_CLR_R
pub fn core_0_pif_pms_monitor_violate_clr( &self ) -> CORE_0_PIF_PMS_MONITOR_VIOLATE_CLR_R
Bit 0 - Set 1 to clear interrupt that core0 initiate illegal PIF bus access.
sourcepub fn core_0_pif_pms_monitor_violate_en(
&self
) -> CORE_0_PIF_PMS_MONITOR_VIOLATE_EN_R
pub fn core_0_pif_pms_monitor_violate_en( &self ) -> CORE_0_PIF_PMS_MONITOR_VIOLATE_EN_R
Bit 1 - Set 1 to enable interrupt that core0 initiate illegal PIF bus access.