Struct esp32s3::extmem::dcache_sync_ctrl::R
source · pub struct R(_);
Expand description
Register DCACHE_SYNC_CTRL
reader
Implementations§
source§impl R
impl R
sourcepub fn dcache_invalidate_ena(&self) -> DCACHE_INVALIDATE_ENA_R
pub fn dcache_invalidate_ena(&self) -> DCACHE_INVALIDATE_ENA_R
Bit 0 - The bit is used to enable invalidate operation. It will be cleared by hardware after invalidate operation done.
sourcepub fn dcache_writeback_ena(&self) -> DCACHE_WRITEBACK_ENA_R
pub fn dcache_writeback_ena(&self) -> DCACHE_WRITEBACK_ENA_R
Bit 1 - The bit is used to enable writeback operation. It will be cleared by hardware after writeback operation done.
sourcepub fn dcache_clean_ena(&self) -> DCACHE_CLEAN_ENA_R
pub fn dcache_clean_ena(&self) -> DCACHE_CLEAN_ENA_R
Bit 2 - The bit is used to enable clean operation. It will be cleared by hardware after clean operation done.
sourcepub fn dcache_sync_done(&self) -> DCACHE_SYNC_DONE_R
pub fn dcache_sync_done(&self) -> DCACHE_SYNC_DONE_R
Bit 3 - The bit is used to indicate clean/writeback/invalidate operation is finished.