#[repr(u16)]
pub enum Interrupt {
Show 90 variants
WIFI_MAC,
WIFI_NMI,
WIFI_PWR,
WIFI_BB,
BT_MAC,
BT_BB,
BT_BB_NMI,
RWBT,
RWBLE,
RWBT_NMI,
RWBLE_NMI,
I2C_MASTER,
UHCI0,
UHCI1,
GPIO,
GPIO_NMI,
GPIO_INTR_2,
GPIO_NMI_2,
SPI1,
SPI2,
SPI3,
LCD_CAM,
I2S0,
I2S1,
UART0,
UART1,
UART2,
PWM0,
PWM1,
LEDC,
EFUSE,
TWAI,
USB,
RTC_CORE,
RMT,
PCNT,
I2C_EXT0,
I2C_EXT1,
SPI2_DMA,
SPI3_DMA,
TIMER1,
TIMER2,
TG0_T0_LEVEL,
TG0_T1_LEVEL,
TG0_WDT_LEVEL,
TG1_T0_LEVEL,
TG1_T1_LEVEL,
TG1_WDT_LEVEL,
CACHE_IA,
SYSTIMER_TARGET0,
SYSTIMER_TARGET1,
SYSTIMER_TARGET2,
SPI_MEM_REJECT_CACHE,
DCACHE_PRELOAD0,
ICACHE_PRELOAD0,
DCACHE_SYNC0,
ICACHE_SYNC0,
APB_ADC,
DMA_IN_CH0,
DMA_IN_CH1,
DMA_IN_CH2,
DMA_IN_CH3,
DMA_IN_CH4,
DMA_OUT_CH0,
DMA_OUT_CH1,
DMA_OUT_CH2,
DMA_OUT_CH3,
DMA_OUT_CH4,
RSA,
SHA,
FROM_CPU_INTR0,
FROM_CPU_INTR1,
FROM_CPU_INTR2,
FROM_CPU_INTR3,
ASSIST_DEBUG,
DMA_APBPERI_PMS,
CORE0_IRAM0_PMS,
CORE0_DRAM0_PMS,
CORE0_PIF_PMS,
CORE0_PIF_PMS_SIZE,
CORE1_IRAM0_PMS,
CORE1_DRAM0_PMS,
CORE1_PIF_PMS,
CORE1_PIF_PMS_SIZE,
BACKUP_PMS_VIOLATE,
CACHE_CORE0_ACS,
CACHE_CORE1_ACS,
USB_DEVICE,
PERI_BACKUP,
DMA_EXTMEM_REJECT,
}
Expand description
Enumeration of all the interrupts.
Variants§
WIFI_MAC
0 - WIFI_MAC
WIFI_NMI
1 - WIFI_NMI
WIFI_PWR
2 - WIFI_PWR
WIFI_BB
3 - WIFI_BB
BT_MAC
4 - BT_MAC
BT_BB
5 - BT_BB
BT_BB_NMI
6 - BT_BB_NMI
RWBT
7 - RWBT
RWBLE
8 - RWBLE
RWBT_NMI
9 - RWBT_NMI
RWBLE_NMI
10 - RWBLE_NMI
I2C_MASTER
11 - I2C_MASTER
UHCI0
14 - UHCI0
UHCI1
15 - UHCI1
GPIO
16 - GPIO
GPIO_NMI
17 - GPIO_NMI
GPIO_INTR_2
18 - GPIO_INTR_2
GPIO_NMI_2
19 - GPIO_NMI_2
SPI1
20 - SPI1
SPI2
21 - SPI2
SPI3
22 - SPI3
LCD_CAM
24 - LCD_CAM
I2S0
25 - I2S0
I2S1
26 - I2S1
UART0
27 - UART0
UART1
28 - UART1
UART2
29 - UART2
PWM0
31 - PWM0
PWM1
32 - PWM1
LEDC
35 - LEDC
EFUSE
36 - EFUSE
TWAI
37 - TWAI
USB
38 - USB
RTC_CORE
39 - RTC_CORE
RMT
40 - RMT
PCNT
41 - PCNT
I2C_EXT0
42 - I2C_EXT0
I2C_EXT1
43 - I2C_EXT1
SPI2_DMA
44 - SPI2_DMA
SPI3_DMA
45 - SPI3_DMA
TIMER1
48 - TIMER1
TIMER2
49 - TIMER2
TG0_T0_LEVEL
50 - TG0_T0_LEVEL
TG0_T1_LEVEL
51 - TG0_T1_LEVEL
TG0_WDT_LEVEL
52 - TG0_WDT_LEVEL
TG1_T0_LEVEL
53 - TG1_T0_LEVEL
TG1_T1_LEVEL
54 - TG1_T1_LEVEL
TG1_WDT_LEVEL
55 - TG1_WDT_LEVEL
CACHE_IA
56 - CACHE_IA
SYSTIMER_TARGET0
57 - SYSTIMER_TARGET0
SYSTIMER_TARGET1
58 - SYSTIMER_TARGET1
SYSTIMER_TARGET2
59 - SYSTIMER_TARGET2
SPI_MEM_REJECT_CACHE
60 - SPI_MEM_REJECT_CACHE
DCACHE_PRELOAD0
61 - DCACHE_PRELOAD0
ICACHE_PRELOAD0
62 - ICACHE_PRELOAD0
DCACHE_SYNC0
63 - DCACHE_SYNC0
ICACHE_SYNC0
64 - ICACHE_SYNC0
APB_ADC
65 - APB_ADC
DMA_IN_CH0
66 - DMA_IN_CH0
DMA_IN_CH1
67 - DMA_IN_CH1
DMA_IN_CH2
68 - DMA_IN_CH2
DMA_IN_CH3
69 - DMA_IN_CH3
DMA_IN_CH4
70 - DMA_IN_CH4
DMA_OUT_CH0
71 - DMA_OUT_CH0
DMA_OUT_CH1
72 - DMA_OUT_CH1
DMA_OUT_CH2
73 - DMA_OUT_CH2
DMA_OUT_CH3
74 - DMA_OUT_CH3
DMA_OUT_CH4
75 - DMA_OUT_CH4
RSA
76 - RSA
SHA
77 - SHA
FROM_CPU_INTR0
79 - FROM_CPU_INTR0
FROM_CPU_INTR1
80 - FROM_CPU_INTR1
FROM_CPU_INTR2
81 - FROM_CPU_INTR2
FROM_CPU_INTR3
82 - FROM_CPU_INTR3
ASSIST_DEBUG
83 - ASSIST_DEBUG
DMA_APBPERI_PMS
84 - DMA_APBPERI_PMS
CORE0_IRAM0_PMS
85 - CORE0_IRAM0_PMS
CORE0_DRAM0_PMS
86 - CORE0_DRAM0_PMS
CORE0_PIF_PMS
87 - CORE0_PIF_PMS
CORE0_PIF_PMS_SIZE
88 - CORE0_PIF_PMS_SIZE
CORE1_IRAM0_PMS
89 - CORE1_IRAM0_PMS
CORE1_DRAM0_PMS
90 - CORE1_DRAM0_PMS
CORE1_PIF_PMS
91 - CORE1_PIF_PMS
CORE1_PIF_PMS_SIZE
92 - CORE1_PIF_PMS_SIZE
BACKUP_PMS_VIOLATE
93 - BACKUP_PMS_VIOLATE
CACHE_CORE0_ACS
94 - CACHE_CORE0_ACS
CACHE_CORE1_ACS
95 - CACHE_CORE1_ACS
USB_DEVICE
96 - USB_DEVICE
PERI_BACKUP
97 - PERI_BACKUP
DMA_EXTMEM_REJECT
98 - DMA_EXTMEM_REJECT