Struct esp32s3::i2c0::scl_high_period::W
source · pub struct W(_);
Expand description
Register SCL_HIGH_PERIOD
writer
Implementations§
source§impl W
impl W
sourcepub fn scl_high_period(&mut self) -> SCL_HIGH_PERIOD_W<'_, 0>
pub fn scl_high_period(&mut self) -> SCL_HIGH_PERIOD_W<'_, 0>
Bits 0:8 - This register is used to configure for how long SCL remains high in master mode, in I2C module clock cycles.
sourcepub fn scl_wait_high_period(&mut self) -> SCL_WAIT_HIGH_PERIOD_W<'_, 9>
pub fn scl_wait_high_period(&mut self) -> SCL_WAIT_HIGH_PERIOD_W<'_, 9>
Bits 9:15 - This register is used to configure for the SCL_FSM’s waiting period for SCL high level in master mode, in I2C module clock cycles.