Module esp32s3::extmem::core1_acs_cache_int_ena
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******* Description ***********
Structs
******* Description ***********
Register
CORE1_ACS_CACHE_INT_ENA
readerRegister
CORE1_ACS_CACHE_INT_ENA
writerType Definitions
Field
CORE1_DBUS_ACS_MSK_DC_INT_ENA
reader - The bit is used to enable interrupt by cpu access dcache while the corresponding dbus is disabled which include speculative access.Field
CORE1_DBUS_ACS_MSK_DC_INT_ENA
writer - The bit is used to enable interrupt by cpu access dcache while the corresponding dbus is disabled which include speculative access.Field
CORE1_DBUS_REJECT_INT_ENA
reader - The bit is used to enable interrupt by authentication fail.Field
CORE1_DBUS_REJECT_INT_ENA
writer - The bit is used to enable interrupt by authentication fail.Field
CORE1_IBUS_ACS_MSK_IC_INT_ENA
reader - The bit is used to enable interrupt by cpu access icache while the corresponding ibus is disabled which include speculative access.Field
CORE1_IBUS_ACS_MSK_IC_INT_ENA
writer - The bit is used to enable interrupt by cpu access icache while the corresponding ibus is disabled which include speculative access.Field
CORE1_IBUS_REJECT_INT_ENA
reader - The bit is used to enable interrupt by authentication fail.Field
CORE1_IBUS_REJECT_INT_ENA
writer - The bit is used to enable interrupt by authentication fail.Field
CORE1_IBUS_WR_IC_INT_ENA
reader - The bit is used to enable interrupt by ibus trying to write icacheField
CORE1_IBUS_WR_IC_INT_ENA
writer - The bit is used to enable interrupt by ibus trying to write icache