Module esp32s3::extmem::core0_acs_cache_int_st
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******* Description ***********
Structs
******* Description ***********
Register
CORE0_ACS_CACHE_INT_ST
readerType Definitions
Field
CORE0_DBUS_ACS_MSK_DCACHE_ST
reader - The bit is used to indicate interrupt by cpu access dcache while the core0_dbus is disabled or dcache is disabled which include speculative access.Field
CORE0_DBUS_REJECT_ST
reader - The bit is used to indicate interrupt by authentication fail.Field
CORE0_IBUS_ACS_MSK_ICACHE_ST
reader - The bit is used to indicate interrupt by cpu access icache while the core0_ibus is disabled or icache is disabled which include speculative access.Field
CORE0_IBUS_REJECT_ST
reader - The bit is used to indicate interrupt by authentication fail.Field
CORE0_IBUS_WR_ICACHE_ST
reader - The bit is used to indicate interrupt by ibus trying to write icache