Module esp32s3::pwm0::cmpr1_cfg

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Expand description

Transfer status and update method for time stamp registers A and B

Structs

Transfer status and update method for time stamp registers A and B
Register CMPR1_CFG reader
Register CMPR1_CFG writer

Type Definitions

Field CMPR1_A_SHDW_FULL reader - Set and reset by hardware. If set, PWM generator 1 time stamp A’s shadow reg is filled and waiting to be transferred to A’s active reg. If cleared, A’s active reg has been updated with shadow register latest value
Field CMPR1_A_UPMETHOD reader - Update method for PWM generator 1 time stamp A’s active register. When all bits are set to 0: immediately, when bit0 is set to 1: TEZ, when bit1 is set to 1: TEP,when bit2 is set to 1: sync, when bit3 is set to 1: disable the update.
Field CMPR1_A_UPMETHOD writer - Update method for PWM generator 1 time stamp A’s active register. When all bits are set to 0: immediately, when bit0 is set to 1: TEZ, when bit1 is set to 1: TEP,when bit2 is set to 1: sync, when bit3 is set to 1: disable the update.
Field CMPR1_B_SHDW_FULL reader - Set and reset by hardware. If set, PWM generator 1 time stamp B’s shadow reg is filled and waiting to be transferred to B’s active reg. If cleared, B’s active reg has been updated with shadow register latest value
Field CMPR1_B_UPMETHOD reader - Update method for PWM generator 1 time stamp B’s active register. When all bits are set to 0: immediately, when bit0 is set to 1: TEZ, when bit1 is set to 1: TEP,when bit2 is set to 1: sync, when bit3 is set to 1: disable the update.
Field CMPR1_B_UPMETHOD writer - Update method for PWM generator 1 time stamp B’s active register. When all bits are set to 0: immediately, when bit0 is set to 1: TEZ, when bit1 is set to 1: TEP,when bit2 is set to 1: sync, when bit3 is set to 1: disable the update.