Struct esp32s3::sensitive::core_1_pif_pms_monitor_2::R
source · pub struct R(_);Expand description
Register CORE_1_PIF_PMS_MONITOR_2 reader
Implementations§
source§impl R
impl R
sourcepub fn core_1_pif_pms_monitor_violate_intr(
&self
) -> CORE_1_PIF_PMS_MONITOR_VIOLATE_INTR_R
pub fn core_1_pif_pms_monitor_violate_intr(
&self
) -> CORE_1_PIF_PMS_MONITOR_VIOLATE_INTR_R
Bit 0 - Record core1 illegal access interrupt state.
sourcepub fn core_1_pif_pms_monitor_violate_status_hport_0(
&self
) -> CORE_1_PIF_PMS_MONITOR_VIOLATE_STATUS_HPORT_0_R
pub fn core_1_pif_pms_monitor_violate_status_hport_0(
&self
) -> CORE_1_PIF_PMS_MONITOR_VIOLATE_STATUS_HPORT_0_R
Bit 1 - Record hport information when core1 initiate illegal access.
sourcepub fn core_1_pif_pms_monitor_violate_status_hsize(
&self
) -> CORE_1_PIF_PMS_MONITOR_VIOLATE_STATUS_HSIZE_R
pub fn core_1_pif_pms_monitor_violate_status_hsize(
&self
) -> CORE_1_PIF_PMS_MONITOR_VIOLATE_STATUS_HSIZE_R
Bits 2:4 - Record access type when core1 initate illegal access.
sourcepub fn core_1_pif_pms_monitor_violate_status_hwrite(
&self
) -> CORE_1_PIF_PMS_MONITOR_VIOLATE_STATUS_HWRITE_R
pub fn core_1_pif_pms_monitor_violate_status_hwrite(
&self
) -> CORE_1_PIF_PMS_MONITOR_VIOLATE_STATUS_HWRITE_R
Bit 5 - Record access direction when core1 initiate illegal access.
sourcepub fn core_1_pif_pms_monitor_violate_status_hworld(
&self
) -> CORE_1_PIF_PMS_MONITOR_VIOLATE_STATUS_HWORLD_R
pub fn core_1_pif_pms_monitor_violate_status_hworld(
&self
) -> CORE_1_PIF_PMS_MONITOR_VIOLATE_STATUS_HWORLD_R
Bits 6:7 - Record world information when core1 initiate illegal access.