Struct esp32s3::extmem::icache_ctrl1::W

pub struct W(_);

Register ICACHE_CTRL1 writer

Implementations

impl W

pub fn icache_shut_core0_bus(&mut self) -> ICACHE_SHUT_CORE0_BUS_W<'_, 0>

Bit 0 - The bit is used to disable core0 ibus, 0: enable, 1: disable

pub fn icache_shut_core1_bus(&mut self) -> ICACHE_SHUT_CORE1_BUS_W<'_, 1>

Bit 1 - The bit is used to disable core1 ibus, 0: enable, 1: disable

pub unsafe fn bits(&mut self, bits: u32) -> &mut Self

Writes raw bits to the register.

Methods from Deref<Target = W<ICACHE_CTRL1_SPEC>>

pub unsafe fn bits(&mut self, bits: REG::Ux) -> &mut Self

Writes raw bits to the register.

Safety

Read datasheet or reference manual to find what values are allowed to pass.

Trait Implementations

impl Deref for W

type Target = W<ICACHE_CTRL1_SPEC>

The resulting type after dereferencing.

fn deref(&self) -> &Self::Target

Dereferences the value.

impl DerefMut for W

fn deref_mut(&mut self) -> &mut Self::Target

Mutably dereferences the value.

impl From<W<ICACHE_CTRL1_SPEC>> for W

fn from(writer: W<ICACHE_CTRL1_SPEC>) -> Self

Converts to this type from the input type.