Struct esp32s3_hal::peripherals::SYSTEM
source · pub struct SYSTEM { /* private fields */ }
Implementations§
source§impl SYSTEM
impl SYSTEM
sourcepub unsafe fn steal() -> SYSTEM
pub unsafe fn steal() -> SYSTEM
Unsafely create an instance of this peripheral out of thin air.
§Safety
You must ensure that you’re only using one instance of this type at a time.
Methods from Deref<Target = RegisterBlock>§
sourcepub fn core_1_control_0(&self) -> &Reg<CORE_1_CONTROL_0_SPEC>
pub fn core_1_control_0(&self) -> &Reg<CORE_1_CONTROL_0_SPEC>
0x00 - Core0 control regiter 0
sourcepub fn core_1_control_1(&self) -> &Reg<CORE_1_CONTROL_1_SPEC>
pub fn core_1_control_1(&self) -> &Reg<CORE_1_CONTROL_1_SPEC>
0x04 - Core0 control regiter 1
sourcepub fn cpu_peri_clk_en(&self) -> &Reg<CPU_PERI_CLK_EN_SPEC>
pub fn cpu_peri_clk_en(&self) -> &Reg<CPU_PERI_CLK_EN_SPEC>
0x08 - cpu_peripheral clock configuration register
sourcepub fn cpu_peri_rst_en(&self) -> &Reg<CPU_PERI_RST_EN_SPEC>
pub fn cpu_peri_rst_en(&self) -> &Reg<CPU_PERI_RST_EN_SPEC>
0x0c - cpu_peripheral reset configuration regsiter
sourcepub fn cpu_per_conf(&self) -> &Reg<CPU_PER_CONF_SPEC>
pub fn cpu_per_conf(&self) -> &Reg<CPU_PER_CONF_SPEC>
0x10 - cpu peripheral clock configuration register
sourcepub fn mem_pd_mask(&self) -> &Reg<MEM_PD_MASK_SPEC>
pub fn mem_pd_mask(&self) -> &Reg<MEM_PD_MASK_SPEC>
0x14 - memory power down mask configuration register
sourcepub fn perip_clk_en0(&self) -> &Reg<PERIP_CLK_EN0_SPEC>
pub fn perip_clk_en0(&self) -> &Reg<PERIP_CLK_EN0_SPEC>
0x18 - peripheral clock configuration regsiter 0
sourcepub fn perip_clk_en1(&self) -> &Reg<PERIP_CLK_EN1_SPEC>
pub fn perip_clk_en1(&self) -> &Reg<PERIP_CLK_EN1_SPEC>
0x1c - peripheral clock configuration regsiter 1
sourcepub fn perip_rst_en0(&self) -> &Reg<PERIP_RST_EN0_SPEC>
pub fn perip_rst_en0(&self) -> &Reg<PERIP_RST_EN0_SPEC>
0x20 - peripheral reset configuration register0
sourcepub fn perip_rst_en1(&self) -> &Reg<PERIP_RST_EN1_SPEC>
pub fn perip_rst_en1(&self) -> &Reg<PERIP_RST_EN1_SPEC>
0x24 - peripheral reset configuration regsiter 1
sourcepub fn bt_lpck_div_int(&self) -> &Reg<BT_LPCK_DIV_INT_SPEC>
pub fn bt_lpck_div_int(&self) -> &Reg<BT_LPCK_DIV_INT_SPEC>
0x28 - low power clock frequent division factor configuration regsiter
sourcepub fn bt_lpck_div_frac(&self) -> &Reg<BT_LPCK_DIV_FRAC_SPEC>
pub fn bt_lpck_div_frac(&self) -> &Reg<BT_LPCK_DIV_FRAC_SPEC>
0x2c - low power clock configuration register
sourcepub fn cpu_intr_from_cpu_0(&self) -> &Reg<CPU_INTR_FROM_CPU_0_SPEC>
pub fn cpu_intr_from_cpu_0(&self) -> &Reg<CPU_INTR_FROM_CPU_0_SPEC>
0x30 - interrupt source register 0
sourcepub fn cpu_intr_from_cpu_1(&self) -> &Reg<CPU_INTR_FROM_CPU_1_SPEC>
pub fn cpu_intr_from_cpu_1(&self) -> &Reg<CPU_INTR_FROM_CPU_1_SPEC>
0x34 - interrupt source register 1
sourcepub fn cpu_intr_from_cpu_2(&self) -> &Reg<CPU_INTR_FROM_CPU_2_SPEC>
pub fn cpu_intr_from_cpu_2(&self) -> &Reg<CPU_INTR_FROM_CPU_2_SPEC>
0x38 - interrupt source register 2
sourcepub fn cpu_intr_from_cpu_3(&self) -> &Reg<CPU_INTR_FROM_CPU_3_SPEC>
pub fn cpu_intr_from_cpu_3(&self) -> &Reg<CPU_INTR_FROM_CPU_3_SPEC>
0x3c - interrupt source register 3
sourcepub fn rsa_pd_ctrl(&self) -> &Reg<RSA_PD_CTRL_SPEC>
pub fn rsa_pd_ctrl(&self) -> &Reg<RSA_PD_CTRL_SPEC>
0x40 - rsa memory power control register
sourcepub fn edma_ctrl(&self) -> &Reg<EDMA_CTRL_SPEC>
pub fn edma_ctrl(&self) -> &Reg<EDMA_CTRL_SPEC>
0x44 - EDMA control register
sourcepub fn cache_control(&self) -> &Reg<CACHE_CONTROL_SPEC>
pub fn cache_control(&self) -> &Reg<CACHE_CONTROL_SPEC>
0x48 - Cache control register
sourcepub fn external_device_encrypt_decrypt_control(
&self
) -> &Reg<EXTERNAL_DEVICE_ENCRYPT_DECRYPT_CONTROL_SPEC>
pub fn external_device_encrypt_decrypt_control( &self ) -> &Reg<EXTERNAL_DEVICE_ENCRYPT_DECRYPT_CONTROL_SPEC>
0x4c - External memory encrypt and decrypt control register
sourcepub fn rtc_fastmem_config(&self) -> &Reg<RTC_FASTMEM_CONFIG_SPEC>
pub fn rtc_fastmem_config(&self) -> &Reg<RTC_FASTMEM_CONFIG_SPEC>
0x50 - RTC fast memory configuration register
sourcepub fn rtc_fastmem_crc(&self) -> &Reg<RTC_FASTMEM_CRC_SPEC>
pub fn rtc_fastmem_crc(&self) -> &Reg<RTC_FASTMEM_CRC_SPEC>
0x54 - RTC fast memory CRC control register
sourcepub fn redundant_eco_ctrl(&self) -> &Reg<REDUNDANT_ECO_CTRL_SPEC>
pub fn redundant_eco_ctrl(&self) -> &Reg<REDUNDANT_ECO_CTRL_SPEC>
0x58 - ******* Description ***********
sourcepub fn clock_gate(&self) -> &Reg<CLOCK_GATE_SPEC>
pub fn clock_gate(&self) -> &Reg<CLOCK_GATE_SPEC>
0x5c - ******* Description ***********
sourcepub fn sysclk_conf(&self) -> &Reg<SYSCLK_CONF_SPEC>
pub fn sysclk_conf(&self) -> &Reg<SYSCLK_CONF_SPEC>
0x60 - System clock configuration register.
sourcepub fn mem_pvt(&self) -> &Reg<MEM_PVT_SPEC>
pub fn mem_pvt(&self) -> &Reg<MEM_PVT_SPEC>
0x64 - ******* Description ***********
sourcepub fn comb_pvt_lvt_conf(&self) -> &Reg<COMB_PVT_LVT_CONF_SPEC>
pub fn comb_pvt_lvt_conf(&self) -> &Reg<COMB_PVT_LVT_CONF_SPEC>
0x68 - ******* Description ***********
sourcepub fn comb_pvt_nvt_conf(&self) -> &Reg<COMB_PVT_NVT_CONF_SPEC>
pub fn comb_pvt_nvt_conf(&self) -> &Reg<COMB_PVT_NVT_CONF_SPEC>
0x6c - ******* Description ***********
sourcepub fn comb_pvt_hvt_conf(&self) -> &Reg<COMB_PVT_HVT_CONF_SPEC>
pub fn comb_pvt_hvt_conf(&self) -> &Reg<COMB_PVT_HVT_CONF_SPEC>
0x70 - ******* Description ***********
sourcepub fn comb_pvt_err_lvt_site0(&self) -> &Reg<COMB_PVT_ERR_LVT_SITE0_SPEC>
pub fn comb_pvt_err_lvt_site0(&self) -> &Reg<COMB_PVT_ERR_LVT_SITE0_SPEC>
0x74 - ******* Description ***********
sourcepub fn comb_pvt_err_nvt_site0(&self) -> &Reg<COMB_PVT_ERR_NVT_SITE0_SPEC>
pub fn comb_pvt_err_nvt_site0(&self) -> &Reg<COMB_PVT_ERR_NVT_SITE0_SPEC>
0x78 - ******* Description ***********
sourcepub fn comb_pvt_err_hvt_site0(&self) -> &Reg<COMB_PVT_ERR_HVT_SITE0_SPEC>
pub fn comb_pvt_err_hvt_site0(&self) -> &Reg<COMB_PVT_ERR_HVT_SITE0_SPEC>
0x7c - ******* Description ***********
sourcepub fn comb_pvt_err_lvt_site1(&self) -> &Reg<COMB_PVT_ERR_LVT_SITE1_SPEC>
pub fn comb_pvt_err_lvt_site1(&self) -> &Reg<COMB_PVT_ERR_LVT_SITE1_SPEC>
0x80 - ******* Description ***********
sourcepub fn comb_pvt_err_nvt_site1(&self) -> &Reg<COMB_PVT_ERR_NVT_SITE1_SPEC>
pub fn comb_pvt_err_nvt_site1(&self) -> &Reg<COMB_PVT_ERR_NVT_SITE1_SPEC>
0x84 - ******* Description ***********
sourcepub fn comb_pvt_err_hvt_site1(&self) -> &Reg<COMB_PVT_ERR_HVT_SITE1_SPEC>
pub fn comb_pvt_err_hvt_site1(&self) -> &Reg<COMB_PVT_ERR_HVT_SITE1_SPEC>
0x88 - ******* Description ***********
sourcepub fn comb_pvt_err_lvt_site2(&self) -> &Reg<COMB_PVT_ERR_LVT_SITE2_SPEC>
pub fn comb_pvt_err_lvt_site2(&self) -> &Reg<COMB_PVT_ERR_LVT_SITE2_SPEC>
0x8c - ******* Description ***********
sourcepub fn comb_pvt_err_nvt_site2(&self) -> &Reg<COMB_PVT_ERR_NVT_SITE2_SPEC>
pub fn comb_pvt_err_nvt_site2(&self) -> &Reg<COMB_PVT_ERR_NVT_SITE2_SPEC>
0x90 - ******* Description ***********
sourcepub fn comb_pvt_err_hvt_site2(&self) -> &Reg<COMB_PVT_ERR_HVT_SITE2_SPEC>
pub fn comb_pvt_err_hvt_site2(&self) -> &Reg<COMB_PVT_ERR_HVT_SITE2_SPEC>
0x94 - ******* Description ***********
sourcepub fn comb_pvt_err_lvt_site3(&self) -> &Reg<COMB_PVT_ERR_LVT_SITE3_SPEC>
pub fn comb_pvt_err_lvt_site3(&self) -> &Reg<COMB_PVT_ERR_LVT_SITE3_SPEC>
0x98 - ******* Description ***********
sourcepub fn comb_pvt_err_nvt_site3(&self) -> &Reg<COMB_PVT_ERR_NVT_SITE3_SPEC>
pub fn comb_pvt_err_nvt_site3(&self) -> &Reg<COMB_PVT_ERR_NVT_SITE3_SPEC>
0x9c - ******* Description ***********
sourcepub fn comb_pvt_err_hvt_site3(&self) -> &Reg<COMB_PVT_ERR_HVT_SITE3_SPEC>
pub fn comb_pvt_err_hvt_site3(&self) -> &Reg<COMB_PVT_ERR_HVT_SITE3_SPEC>
0xa0 - ******* Description ***********