Struct esp32s3_hal::peripherals::INTERRUPT_CORE0

pub struct INTERRUPT_CORE0 { /* private fields */ }

Implementations

impl INTERRUPT_CORE0

pub unsafe fn steal() -> INTERRUPT_CORE0

Unsafely create an instance of this peripheral out of thin air.

Safety

You must ensure that you’re only using one instance of this type at a time.

pub const PTR: *const <INTERRUPT_CORE0 as Deref>::Target = {0x600c2000 as *const <esp32s3::INTERRUPT_CORE0 as core::ops::Deref>::Target}

Pointer to the register block

pub const fn ptr() -> *const <INTERRUPT_CORE0 as Deref>::Target

Return the pointer to the register block

Methods from Deref<Target = RegisterBlock>

pub fn pro_mac_intr_map(&self) -> &Reg<PRO_MAC_INTR_MAP_SPEC>

0x00 - mac interrupt configuration register

pub fn mac_nmi_map(&self) -> &Reg<MAC_NMI_MAP_SPEC>

0x04 - mac_nmi interrupt configuration register

pub fn pwr_intr_map(&self) -> &Reg<PWR_INTR_MAP_SPEC>

0x08 - pwr interrupt configuration register

pub fn bb_int_map(&self) -> &Reg<BB_INT_MAP_SPEC>

0x0c - bb interrupt configuration register

pub fn bt_mac_int_map(&self) -> &Reg<BT_MAC_INT_MAP_SPEC>

0x10 - bb_mac interrupt configuration register

pub fn bt_bb_int_map(&self) -> &Reg<BT_BB_INT_MAP_SPEC>

0x14 - bt_bb interrupt configuration register

pub fn bt_bb_nmi_map(&self) -> &Reg<BT_BB_NMI_MAP_SPEC>

0x18 - bt_bb_nmi interrupt configuration register

pub fn rwbt_irq_map(&self) -> &Reg<RWBT_IRQ_MAP_SPEC>

0x1c - rwbt_irq interrupt configuration register

pub fn rwble_irq_map(&self) -> &Reg<RWBLE_IRQ_MAP_SPEC>

0x20 - rwble_irq interrupt configuration register

pub fn rwbt_nmi_map(&self) -> &Reg<RWBT_NMI_MAP_SPEC>

0x24 - rwbt_nmi interrupt configuration register

pub fn rwble_nmi_map(&self) -> &Reg<RWBLE_NMI_MAP_SPEC>

0x28 - rwble_nmi interrupt configuration register

pub fn i2c_mst_int_map(&self) -> &Reg<I2C_MST_INT_MAP_SPEC>

0x2c - i2c_mst interrupt configuration register

pub fn slc0_intr_map(&self) -> &Reg<SLC0_INTR_MAP_SPEC>

0x30 - slc0 interrupt configuration register

pub fn slc1_intr_map(&self) -> &Reg<SLC1_INTR_MAP_SPEC>

0x34 - slc1 interrupt configuration register

pub fn uhci0_intr_map(&self) -> &Reg<UHCI0_INTR_MAP_SPEC>

0x38 - uhci0 interrupt configuration register

pub fn uhci1_intr_map(&self) -> &Reg<UHCI1_INTR_MAP_SPEC>

0x3c - uhci1 interrupt configuration register

pub fn gpio_interrupt_pro_map(&self) -> &Reg<GPIO_INTERRUPT_PRO_MAP_SPEC>

0x40 - gpio_interrupt_pro interrupt configuration register

pub fn gpio_interrupt_pro_nmi_map( &self ) -> &Reg<GPIO_INTERRUPT_PRO_NMI_MAP_SPEC>

0x44 - gpio_interrupt_pro_nmi interrupt configuration register

pub fn gpio_interrupt_app_map(&self) -> &Reg<GPIO_INTERRUPT_APP_MAP_SPEC>

0x48 - gpio_interrupt_app interrupt configuration register

pub fn gpio_interrupt_app_nmi_map( &self ) -> &Reg<GPIO_INTERRUPT_APP_NMI_MAP_SPEC>

0x4c - gpio_interrupt_app_nmi interrupt configuration register

pub fn spi_intr_1_map(&self) -> &Reg<SPI_INTR_1_MAP_SPEC>

0x50 - spi_intr_1 interrupt configuration register

pub fn spi_intr_2_map(&self) -> &Reg<SPI_INTR_2_MAP_SPEC>

0x54 - spi_intr_2 interrupt configuration register

pub fn spi_intr_3_map(&self) -> &Reg<SPI_INTR_3_MAP_SPEC>

0x58 - spi_intr_3 interrupt configuration register

pub fn spi_intr_4_map(&self) -> &Reg<SPI_INTR_4_MAP_SPEC>

0x5c - spi_intr_4 interrupt configuration register

pub fn lcd_cam_int_map(&self) -> &Reg<LCD_CAM_INT_MAP_SPEC>

0x60 - lcd_cam interrupt configuration register

pub fn i2s0_int_map(&self) -> &Reg<I2S0_INT_MAP_SPEC>

0x64 - i2s0 interrupt configuration register

pub fn i2s1_int_map(&self) -> &Reg<I2S1_INT_MAP_SPEC>

0x68 - i2s1 interrupt configuration register

pub fn uart_intr_map(&self) -> &Reg<UART_INTR_MAP_SPEC>

0x6c - uart interrupt configuration register

pub fn uart1_intr_map(&self) -> &Reg<UART1_INTR_MAP_SPEC>

0x70 - uart1 interrupt configuration register

pub fn uart2_intr_map(&self) -> &Reg<UART2_INTR_MAP_SPEC>

0x74 - uart2 interrupt configuration register

pub fn sdio_host_interrupt_map(&self) -> &Reg<SDIO_HOST_INTERRUPT_MAP_SPEC>

0x78 - sdio_host interrupt configuration register

pub fn pwm0_intr_map(&self) -> &Reg<PWM0_INTR_MAP_SPEC>

0x7c - pwm0 interrupt configuration register

pub fn pwm1_intr_map(&self) -> &Reg<PWM1_INTR_MAP_SPEC>

0x80 - pwm1 interrupt configuration register

pub fn pwm2_intr_map(&self) -> &Reg<PWM2_INTR_MAP_SPEC>

0x84 - pwm2 interrupt configuration register

pub fn pwm3_intr_map(&self) -> &Reg<PWM3_INTR_MAP_SPEC>

0x88 - pwm3 interrupt configuration register

pub fn ledc_int_map(&self) -> &Reg<LEDC_INT_MAP_SPEC>

0x8c - ledc interrupt configuration register

pub fn efuse_int_map(&self) -> &Reg<EFUSE_INT_MAP_SPEC>

0x90 - efuse interrupt configuration register

pub fn can_int_map(&self) -> &Reg<CAN_INT_MAP_SPEC>

0x94 - can interrupt configuration register

pub fn usb_intr_map(&self) -> &Reg<USB_INTR_MAP_SPEC>

0x98 - usb interrupt configuration register

pub fn rtc_core_intr_map(&self) -> &Reg<RTC_CORE_INTR_MAP_SPEC>

0x9c - rtc_core interrupt configuration register

pub fn rmt_intr_map(&self) -> &Reg<RMT_INTR_MAP_SPEC>

0xa0 - rmt interrupt configuration register

pub fn pcnt_intr_map(&self) -> &Reg<PCNT_INTR_MAP_SPEC>

0xa4 - pcnt interrupt configuration register

pub fn i2c_ext0_intr_map(&self) -> &Reg<I2C_EXT0_INTR_MAP_SPEC>

0xa8 - i2c_ext0 interrupt configuration register

pub fn i2c_ext1_intr_map(&self) -> &Reg<I2C_EXT1_INTR_MAP_SPEC>

0xac - i2c_ext1 interrupt configuration register

pub fn spi2_dma_int_map(&self) -> &Reg<SPI2_DMA_INT_MAP_SPEC>

0xb0 - spi2_dma interrupt configuration register

pub fn spi3_dma_int_map(&self) -> &Reg<SPI3_DMA_INT_MAP_SPEC>

0xb4 - spi3_dma interrupt configuration register

pub fn spi4_dma_int_map(&self) -> &Reg<SPI4_DMA_INT_MAP_SPEC>

0xb8 - spi4_dma interrupt configuration register

pub fn wdg_int_map(&self) -> &Reg<WDG_INT_MAP_SPEC>

0xbc - wdg interrupt configuration register

pub fn timer_int1_map(&self) -> &Reg<TIMER_INT1_MAP_SPEC>

0xc0 - timer_int1 interrupt configuration register

pub fn timer_int2_map(&self) -> &Reg<TIMER_INT2_MAP_SPEC>

0xc4 - timer_int2 interrupt configuration register

pub fn tg_t0_int_map(&self) -> &Reg<TG_T0_INT_MAP_SPEC>

0xc8 - tg_t0 interrupt configuration register

pub fn tg_t1_int_map(&self) -> &Reg<TG_T1_INT_MAP_SPEC>

0xcc - tg_t1 interrupt configuration register

pub fn tg_wdt_int_map(&self) -> &Reg<TG_WDT_INT_MAP_SPEC>

0xd0 - tg_wdt interrupt configuration register

pub fn tg1_t0_int_map(&self) -> &Reg<TG1_T0_INT_MAP_SPEC>

0xd4 - tg1_t0 interrupt configuration register

pub fn tg1_t1_int_map(&self) -> &Reg<TG1_T1_INT_MAP_SPEC>

0xd8 - tg1_t1 interrupt configuration register

pub fn tg1_wdt_int_map(&self) -> &Reg<TG1_WDT_INT_MAP_SPEC>

0xdc - tg1_wdt interrupt configuration register

pub fn cache_ia_int_map(&self) -> &Reg<CACHE_IA_INT_MAP_SPEC>

0xe0 - cache_ia interrupt configuration register

pub fn systimer_target0_int_map(&self) -> &Reg<SYSTIMER_TARGET0_INT_MAP_SPEC>

0xe4 - systimer_target0 interrupt configuration register

pub fn systimer_target1_int_map(&self) -> &Reg<SYSTIMER_TARGET1_INT_MAP_SPEC>

0xe8 - systimer_target1 interrupt configuration register

pub fn systimer_target2_int_map(&self) -> &Reg<SYSTIMER_TARGET2_INT_MAP_SPEC>

0xec - systimer_target2 interrupt configuration register

pub fn spi_mem_reject_intr_map(&self) -> &Reg<SPI_MEM_REJECT_INTR_MAP_SPEC>

0xf0 - spi_mem_reject interrupt configuration register

pub fn dcache_preload_int_map(&self) -> &Reg<DCACHE_PRELOAD_INT_MAP_SPEC>

0xf4 - dcache_prelaod interrupt configuration register

pub fn icache_preload_int_map(&self) -> &Reg<ICACHE_PRELOAD_INT_MAP_SPEC>

0xf8 - icache_preload interrupt configuration register

pub fn dcache_sync_int_map(&self) -> &Reg<DCACHE_SYNC_INT_MAP_SPEC>

0xfc - dcache_sync interrupt configuration register

pub fn icache_sync_int_map(&self) -> &Reg<ICACHE_SYNC_INT_MAP_SPEC>

0x100 - icache_sync interrupt configuration register

pub fn apb_adc_int_map(&self) -> &Reg<APB_ADC_INT_MAP_SPEC>

0x104 - apb_adc interrupt configuration register

pub fn dma_in_ch0_int_map(&self) -> &Reg<DMA_IN_CH0_INT_MAP_SPEC>

0x108 - dma_in_ch0 interrupt configuration register

pub fn dma_in_ch1_int_map(&self) -> &Reg<DMA_IN_CH1_INT_MAP_SPEC>

0x10c - dma_in_ch1 interrupt configuration register

pub fn dma_in_ch2_int_map(&self) -> &Reg<DMA_IN_CH2_INT_MAP_SPEC>

0x110 - dma_in_ch2 interrupt configuration register

pub fn dma_in_ch3_int_map(&self) -> &Reg<DMA_IN_CH3_INT_MAP_SPEC>

0x114 - dma_in_ch3 interrupt configuration register

pub fn dma_in_ch4_int_map(&self) -> &Reg<DMA_IN_CH4_INT_MAP_SPEC>

0x118 - dma_in_ch4 interrupt configuration register

pub fn dma_out_ch0_int_map(&self) -> &Reg<DMA_OUT_CH0_INT_MAP_SPEC>

0x11c - dma_out_ch0 interrupt configuration register

pub fn dma_out_ch1_int_map(&self) -> &Reg<DMA_OUT_CH1_INT_MAP_SPEC>

0x120 - dma_out_ch1 interrupt configuration register

pub fn dma_out_ch2_int_map(&self) -> &Reg<DMA_OUT_CH2_INT_MAP_SPEC>

0x124 - dma_out_ch2 interrupt configuration register

pub fn dma_out_ch3_int_map(&self) -> &Reg<DMA_OUT_CH3_INT_MAP_SPEC>

0x128 - dma_out_ch3 interrupt configuration register

pub fn dma_out_ch4_int_map(&self) -> &Reg<DMA_OUT_CH4_INT_MAP_SPEC>

0x12c - dma_out_ch4 interrupt configuration register

pub fn rsa_int_map(&self) -> &Reg<RSA_INT_MAP_SPEC>

0x130 - rsa interrupt configuration register

pub fn aes_int_map(&self) -> &Reg<AES_INT_MAP_SPEC>

0x134 - aes interrupt configuration register

pub fn sha_int_map(&self) -> &Reg<SHA_INT_MAP_SPEC>

0x138 - sha interrupt configuration register

pub fn cpu_intr_from_cpu_0_map(&self) -> &Reg<CPU_INTR_FROM_CPU_0_MAP_SPEC>

0x13c - cpu_intr_from_cpu_0 interrupt configuration register

pub fn cpu_intr_from_cpu_1_map(&self) -> &Reg<CPU_INTR_FROM_CPU_1_MAP_SPEC>

0x140 - cpu_intr_from_cpu_1 interrupt configuration register

pub fn cpu_intr_from_cpu_2_map(&self) -> &Reg<CPU_INTR_FROM_CPU_2_MAP_SPEC>

0x144 - cpu_intr_from_cpu_2 interrupt configuration register

pub fn cpu_intr_from_cpu_3_map(&self) -> &Reg<CPU_INTR_FROM_CPU_3_MAP_SPEC>

0x148 - cpu_intr_from_cpu_3 interrupt configuration register

pub fn assist_debug_intr_map(&self) -> &Reg<ASSIST_DEBUG_INTR_MAP_SPEC>

0x14c - assist_debug interrupt configuration register

pub fn dma_apbperi_pms_monitor_violate_intr_map( &self ) -> &Reg<DMA_APBPERI_PMS_MONITOR_VIOLATE_INTR_MAP_SPEC>

0x150 - dma_pms_monitor_violatile interrupt configuration register

pub fn core_0_iram0_pms_monitor_violate_intr_map( &self ) -> &Reg<CORE_0_IRAM0_PMS_MONITOR_VIOLATE_INTR_MAP_SPEC>

0x154 - core0_IRam0_pms_monitor_violatile interrupt configuration register

pub fn core_0_dram0_pms_monitor_violate_intr_map( &self ) -> &Reg<CORE_0_DRAM0_PMS_MONITOR_VIOLATE_INTR_MAP_SPEC>

0x158 - core0_DRam0_pms_monitor_violatile interrupt configuration register

pub fn core_0_pif_pms_monitor_violate_intr_map( &self ) -> &Reg<CORE_0_PIF_PMS_MONITOR_VIOLATE_INTR_MAP_SPEC>

0x15c - core0_PIF_pms_monitor_violatile interrupt configuration register

pub fn core_0_pif_pms_monitor_violate_size_intr_map( &self ) -> &Reg<CORE_0_PIF_PMS_MONITOR_VIOLATE_SIZE_INTR_MAP_SPEC>

0x160 - core0_PIF_pms_monitor_violatile_size interrupt configuration register

pub fn core_1_iram0_pms_monitor_violate_intr_map( &self ) -> &Reg<CORE_1_IRAM0_PMS_MONITOR_VIOLATE_INTR_MAP_SPEC>

0x164 - core1_IRam0_pms_monitor_violatile interrupt configuration register

pub fn core_1_dram0_pms_monitor_violate_intr_map( &self ) -> &Reg<CORE_1_DRAM0_PMS_MONITOR_VIOLATE_INTR_MAP_SPEC>

0x168 - core1_DRam0_pms_monitor_violatile interrupt configuration register

pub fn core_1_pif_pms_monitor_violate_intr_map( &self ) -> &Reg<CORE_1_PIF_PMS_MONITOR_VIOLATE_INTR_MAP_SPEC>

0x16c - core1_PIF_pms_monitor_violatile interrupt configuration register

pub fn core_1_pif_pms_monitor_violate_size_intr_map( &self ) -> &Reg<CORE_1_PIF_PMS_MONITOR_VIOLATE_SIZE_INTR_MAP_SPEC>

0x170 - core1_PIF_pms_monitor_violatile_size interrupt configuration register

pub fn backup_pms_violate_intr_map( &self ) -> &Reg<BACKUP_PMS_VIOLATE_INTR_MAP_SPEC>

0x174 - backup_pms_monitor_violatile interrupt configuration register

pub fn cache_core0_acs_int_map(&self) -> &Reg<CACHE_CORE0_ACS_INT_MAP_SPEC>

0x178 - cache_core0_acs interrupt configuration register

pub fn cache_core1_acs_int_map(&self) -> &Reg<CACHE_CORE1_ACS_INT_MAP_SPEC>

0x17c - cache_core1_acs interrupt configuration register

pub fn usb_device_int_map(&self) -> &Reg<USB_DEVICE_INT_MAP_SPEC>

0x180 - usb_device interrupt configuration register

pub fn peri_backup_int_map(&self) -> &Reg<PERI_BACKUP_INT_MAP_SPEC>

0x184 - peri_backup interrupt configuration register

pub fn dma_extmem_reject_int_map(&self) -> &Reg<DMA_EXTMEM_REJECT_INT_MAP_SPEC>

0x188 - dma_extmem_reject interrupt configuration register

pub fn pro_intr_status_0(&self) -> &Reg<PRO_INTR_STATUS_0_SPEC>

0x18c - interrupt status register

pub fn pro_intr_status_1(&self) -> &Reg<PRO_INTR_STATUS_1_SPEC>

0x190 - interrupt status register

pub fn pro_intr_status_2(&self) -> &Reg<PRO_INTR_STATUS_2_SPEC>

0x194 - interrupt status register

pub fn pro_intr_status_3(&self) -> &Reg<PRO_INTR_STATUS_3_SPEC>

0x198 - interrupt status register

pub fn clock_gate(&self) -> &Reg<CLOCK_GATE_SPEC>

0x19c - clock gate register

pub fn date(&self) -> &Reg<DATE_SPEC>

0x7fc - version register

Trait Implementations

impl Debug for INTERRUPT_CORE0

fn fmt(&self, f: &mut Formatter<'_>) -> Result<(), Error>

Formats the value using the given formatter.

impl Deref for INTERRUPT_CORE0

type Target = <INTERRUPT_CORE0 as Deref>::Target

The resulting type after dereferencing.

fn deref(&self) -> &<INTERRUPT_CORE0 as Deref>::Target

Dereferences the value.

impl DerefMut for INTERRUPT_CORE0

fn deref_mut(&mut self) -> &mut <INTERRUPT_CORE0 as Deref>::Target

Mutably dereferences the value.

impl Peripheral for INTERRUPT_CORE0

type P = INTERRUPT_CORE0

Peripheral singleton type

unsafe fn clone_unchecked(&mut self) -> <INTERRUPT_CORE0 as Peripheral>::P

Unsafely clone (duplicate) a peripheral singleton.

fn into_ref<'a>(self) -> PeripheralRef<'a, Self::P>

where Self: 'a,

Convert a value into a PeripheralRef.