Struct esp32s3_hal::peripherals::ASSIST_DEBUG
source · pub struct ASSIST_DEBUG { /* private fields */ }
Implementations§
source§impl ASSIST_DEBUG
impl ASSIST_DEBUG
sourcepub unsafe fn steal() -> ASSIST_DEBUG
pub unsafe fn steal() -> ASSIST_DEBUG
Unsafely create an instance of this peripheral out of thin air.
§Safety
You must ensure that you’re only using one instance of this type at a time.
Methods from Deref<Target = RegisterBlock>§
sourcepub fn core_0_montr_ena(&self) -> &Reg<CORE_0_MONTR_ENA_SPEC>
pub fn core_0_montr_ena(&self) -> &Reg<CORE_0_MONTR_ENA_SPEC>
0x00 - core0 monitor enable configuration register
sourcepub fn core_0_intr_raw(&self) -> &Reg<CORE_0_INTR_RAW_SPEC>
pub fn core_0_intr_raw(&self) -> &Reg<CORE_0_INTR_RAW_SPEC>
0x04 - core0 monitor interrupt status register
sourcepub fn core_0_intr_ena(&self) -> &Reg<CORE_0_INTR_ENA_SPEC>
pub fn core_0_intr_ena(&self) -> &Reg<CORE_0_INTR_ENA_SPEC>
0x08 - core0 monitor interrupt enable register
sourcepub fn core_0_intr_clr(&self) -> &Reg<CORE_0_INTR_CLR_SPEC>
pub fn core_0_intr_clr(&self) -> &Reg<CORE_0_INTR_CLR_SPEC>
0x0c - core0 monitor interrupt clr register
sourcepub fn core_0_area_dram0_0_min(&self) -> &Reg<CORE_0_AREA_DRAM0_0_MIN_SPEC>
pub fn core_0_area_dram0_0_min(&self) -> &Reg<CORE_0_AREA_DRAM0_0_MIN_SPEC>
0x10 - core0 dram0 region0 addr configuration register
sourcepub fn core_0_area_dram0_0_max(&self) -> &Reg<CORE_0_AREA_DRAM0_0_MAX_SPEC>
pub fn core_0_area_dram0_0_max(&self) -> &Reg<CORE_0_AREA_DRAM0_0_MAX_SPEC>
0x14 - core0 dram0 region0 addr configuration register
sourcepub fn core_0_area_dram0_1_min(&self) -> &Reg<CORE_0_AREA_DRAM0_1_MIN_SPEC>
pub fn core_0_area_dram0_1_min(&self) -> &Reg<CORE_0_AREA_DRAM0_1_MIN_SPEC>
0x18 - core0 dram0 region1 addr configuration register
sourcepub fn core_0_area_dram0_1_max(&self) -> &Reg<CORE_0_AREA_DRAM0_1_MAX_SPEC>
pub fn core_0_area_dram0_1_max(&self) -> &Reg<CORE_0_AREA_DRAM0_1_MAX_SPEC>
0x1c - core0 dram0 region1 addr configuration register
sourcepub fn core_0_area_pif_0_min(&self) -> &Reg<CORE_0_AREA_PIF_0_MIN_SPEC>
pub fn core_0_area_pif_0_min(&self) -> &Reg<CORE_0_AREA_PIF_0_MIN_SPEC>
0x20 - core0 PIF region0 addr configuration register
sourcepub fn core_0_area_pif_0_max(&self) -> &Reg<CORE_0_AREA_PIF_0_MAX_SPEC>
pub fn core_0_area_pif_0_max(&self) -> &Reg<CORE_0_AREA_PIF_0_MAX_SPEC>
0x24 - core0 PIF region0 addr configuration register
sourcepub fn core_0_area_pif_1_min(&self) -> &Reg<CORE_0_AREA_PIF_1_MIN_SPEC>
pub fn core_0_area_pif_1_min(&self) -> &Reg<CORE_0_AREA_PIF_1_MIN_SPEC>
0x28 - core0 PIF region1 addr configuration register
sourcepub fn core_0_area_pif_1_max(&self) -> &Reg<CORE_0_AREA_PIF_1_MAX_SPEC>
pub fn core_0_area_pif_1_max(&self) -> &Reg<CORE_0_AREA_PIF_1_MAX_SPEC>
0x2c - core0 PIF region1 addr configuration register
sourcepub fn core_0_area_sp(&self) -> &Reg<CORE_0_AREA_SP_SPEC>
pub fn core_0_area_sp(&self) -> &Reg<CORE_0_AREA_SP_SPEC>
0x30 - core0 area sp status register
sourcepub fn core_0_area_pc(&self) -> &Reg<CORE_0_AREA_PC_SPEC>
pub fn core_0_area_pc(&self) -> &Reg<CORE_0_AREA_PC_SPEC>
0x34 - core0 area pc status register
sourcepub fn core_0_sp_unstable(&self) -> &Reg<CORE_0_SP_UNSTABLE_SPEC>
pub fn core_0_sp_unstable(&self) -> &Reg<CORE_0_SP_UNSTABLE_SPEC>
0x38 - core0 sp unstable configuration register
sourcepub fn core_0_sp_min(&self) -> &Reg<CORE_0_SP_MIN_SPEC>
pub fn core_0_sp_min(&self) -> &Reg<CORE_0_SP_MIN_SPEC>
0x3c - core0 sp region configuration regsiter
sourcepub fn core_0_sp_max(&self) -> &Reg<CORE_0_SP_MAX_SPEC>
pub fn core_0_sp_max(&self) -> &Reg<CORE_0_SP_MAX_SPEC>
0x40 - core0 sp region configuration regsiter
sourcepub fn core_0_sp_pc(&self) -> &Reg<CORE_0_SP_PC_SPEC>
pub fn core_0_sp_pc(&self) -> &Reg<CORE_0_SP_PC_SPEC>
0x44 - core0 sp pc status register
sourcepub fn core_0_rcd_pdebugenable(&self) -> &Reg<CORE_0_RCD_PDEBUGENABLE_SPEC>
pub fn core_0_rcd_pdebugenable(&self) -> &Reg<CORE_0_RCD_PDEBUGENABLE_SPEC>
0x48 - core0 pdebug configuration register
sourcepub fn core_0_rcd_recording(&self) -> &Reg<CORE_0_RCD_RECORDING_SPEC>
pub fn core_0_rcd_recording(&self) -> &Reg<CORE_0_RCD_RECORDING_SPEC>
0x4c - core0 pdebug status register
sourcepub fn core_0_rcd_pdebuginst(&self) -> &Reg<CORE_0_RCD_PDEBUGINST_SPEC>
pub fn core_0_rcd_pdebuginst(&self) -> &Reg<CORE_0_RCD_PDEBUGINST_SPEC>
0x50 - core0 pdebug status register
sourcepub fn core_0_rcd_pdebugstatus(&self) -> &Reg<CORE_0_RCD_PDEBUGSTATUS_SPEC>
pub fn core_0_rcd_pdebugstatus(&self) -> &Reg<CORE_0_RCD_PDEBUGSTATUS_SPEC>
0x54 - core0 pdebug status register
sourcepub fn core_0_rcd_pdebugdata(&self) -> &Reg<CORE_0_RCD_PDEBUGDATA_SPEC>
pub fn core_0_rcd_pdebugdata(&self) -> &Reg<CORE_0_RCD_PDEBUGDATA_SPEC>
0x58 - core0 pdebug status register
sourcepub fn core_0_rcd_pdebugpc(&self) -> &Reg<CORE_0_RCD_PDEBUGPC_SPEC>
pub fn core_0_rcd_pdebugpc(&self) -> &Reg<CORE_0_RCD_PDEBUGPC_SPEC>
0x5c - core0 pdebug status register
sourcepub fn core_0_rcd_pdebugls0stat(&self) -> &Reg<CORE_0_RCD_PDEBUGLS0STAT_SPEC>
pub fn core_0_rcd_pdebugls0stat(&self) -> &Reg<CORE_0_RCD_PDEBUGLS0STAT_SPEC>
0x60 - core0 pdebug status register
sourcepub fn core_0_rcd_pdebugls0addr(&self) -> &Reg<CORE_0_RCD_PDEBUGLS0ADDR_SPEC>
pub fn core_0_rcd_pdebugls0addr(&self) -> &Reg<CORE_0_RCD_PDEBUGLS0ADDR_SPEC>
0x64 - core0 pdebug status register
sourcepub fn core_0_rcd_pdebugls0data(&self) -> &Reg<CORE_0_RCD_PDEBUGLS0DATA_SPEC>
pub fn core_0_rcd_pdebugls0data(&self) -> &Reg<CORE_0_RCD_PDEBUGLS0DATA_SPEC>
0x68 - core0 pdebug status register
sourcepub fn core_0_rcd_sp(&self) -> &Reg<CORE_0_RCD_SP_SPEC>
pub fn core_0_rcd_sp(&self) -> &Reg<CORE_0_RCD_SP_SPEC>
0x6c - core0 pdebug status register
sourcepub fn core_0_iram0_exception_monitor_0(
&self
) -> &Reg<CORE_0_IRAM0_EXCEPTION_MONITOR_0_SPEC>
pub fn core_0_iram0_exception_monitor_0( &self ) -> &Reg<CORE_0_IRAM0_EXCEPTION_MONITOR_0_SPEC>
0x70 - core0 bus busy status regsiter
sourcepub fn core_0_iram0_exception_monitor_1(
&self
) -> &Reg<CORE_0_IRAM0_EXCEPTION_MONITOR_1_SPEC>
pub fn core_0_iram0_exception_monitor_1( &self ) -> &Reg<CORE_0_IRAM0_EXCEPTION_MONITOR_1_SPEC>
0x74 - core0 bus busy status regsiter
sourcepub fn core_0_dram0_exception_monitor_0(
&self
) -> &Reg<CORE_0_DRAM0_EXCEPTION_MONITOR_0_SPEC>
pub fn core_0_dram0_exception_monitor_0( &self ) -> &Reg<CORE_0_DRAM0_EXCEPTION_MONITOR_0_SPEC>
0x78 - core0 bus busy status regsiter
sourcepub fn core_0_dram0_exception_monitor_1(
&self
) -> &Reg<CORE_0_DRAM0_EXCEPTION_MONITOR_1_SPEC>
pub fn core_0_dram0_exception_monitor_1( &self ) -> &Reg<CORE_0_DRAM0_EXCEPTION_MONITOR_1_SPEC>
0x7c - core0 bus busy status regsiter
sourcepub fn core_0_dram0_exception_monitor_2(
&self
) -> &Reg<CORE_0_DRAM0_EXCEPTION_MONITOR_2_SPEC>
pub fn core_0_dram0_exception_monitor_2( &self ) -> &Reg<CORE_0_DRAM0_EXCEPTION_MONITOR_2_SPEC>
0x80 - core0 bus busy status regsiter
sourcepub fn core_0_dram0_exception_monitor_3(
&self
) -> &Reg<CORE_0_DRAM0_EXCEPTION_MONITOR_3_SPEC>
pub fn core_0_dram0_exception_monitor_3( &self ) -> &Reg<CORE_0_DRAM0_EXCEPTION_MONITOR_3_SPEC>
0x84 - core0 bus busy status regsiter
sourcepub fn core_0_dram0_exception_monitor_4(
&self
) -> &Reg<CORE_0_DRAM0_EXCEPTION_MONITOR_4_SPEC>
pub fn core_0_dram0_exception_monitor_4( &self ) -> &Reg<CORE_0_DRAM0_EXCEPTION_MONITOR_4_SPEC>
0x88 - core0 bus busy configuration regsiter
sourcepub fn core_0_dram0_exception_monitor_5(
&self
) -> &Reg<CORE_0_DRAM0_EXCEPTION_MONITOR_5_SPEC>
pub fn core_0_dram0_exception_monitor_5( &self ) -> &Reg<CORE_0_DRAM0_EXCEPTION_MONITOR_5_SPEC>
0x8c - core0 bus busy configuration regsiter
sourcepub fn core_1_montr_ena(&self) -> &Reg<CORE_1_MONTR_ENA_SPEC>
pub fn core_1_montr_ena(&self) -> &Reg<CORE_1_MONTR_ENA_SPEC>
0x90 - Core1 monitor enable configuration register
sourcepub fn core_1_intr_raw(&self) -> &Reg<CORE_1_INTR_RAW_SPEC>
pub fn core_1_intr_raw(&self) -> &Reg<CORE_1_INTR_RAW_SPEC>
0x94 - Core1 monitor interrupt status register
sourcepub fn core_1_intr_ena(&self) -> &Reg<CORE_1_INTR_ENA_SPEC>
pub fn core_1_intr_ena(&self) -> &Reg<CORE_1_INTR_ENA_SPEC>
0x98 - Core1 monitor interrupt enable register
sourcepub fn core_1_intr_clr(&self) -> &Reg<CORE_1_INTR_CLR_SPEC>
pub fn core_1_intr_clr(&self) -> &Reg<CORE_1_INTR_CLR_SPEC>
0x9c - Core1 monitor interrupt clr register
sourcepub fn core_1_area_dram0_0_min(&self) -> &Reg<CORE_1_AREA_DRAM0_0_MIN_SPEC>
pub fn core_1_area_dram0_0_min(&self) -> &Reg<CORE_1_AREA_DRAM0_0_MIN_SPEC>
0xa0 - Core1 dram0 region0 addr configuration register
sourcepub fn core_1_area_dram0_0_max(&self) -> &Reg<CORE_1_AREA_DRAM0_0_MAX_SPEC>
pub fn core_1_area_dram0_0_max(&self) -> &Reg<CORE_1_AREA_DRAM0_0_MAX_SPEC>
0xa4 - Core1 dram0 region0 addr configuration register
sourcepub fn core_1_area_dram0_1_min(&self) -> &Reg<CORE_1_AREA_DRAM0_1_MIN_SPEC>
pub fn core_1_area_dram0_1_min(&self) -> &Reg<CORE_1_AREA_DRAM0_1_MIN_SPEC>
0xa8 - Core1 dram0 region1 addr configuration register
sourcepub fn core_1_area_dram0_1_max(&self) -> &Reg<CORE_1_AREA_DRAM0_1_MAX_SPEC>
pub fn core_1_area_dram0_1_max(&self) -> &Reg<CORE_1_AREA_DRAM0_1_MAX_SPEC>
0xac - Core1 dram0 region1 addr configuration register
sourcepub fn core_1_area_pif_0_min(&self) -> &Reg<CORE_1_AREA_PIF_0_MIN_SPEC>
pub fn core_1_area_pif_0_min(&self) -> &Reg<CORE_1_AREA_PIF_0_MIN_SPEC>
0xb0 - Core1 PIF region0 addr configuration register
sourcepub fn core_1_area_pif_0_max(&self) -> &Reg<CORE_1_AREA_PIF_0_MAX_SPEC>
pub fn core_1_area_pif_0_max(&self) -> &Reg<CORE_1_AREA_PIF_0_MAX_SPEC>
0xb4 - Core1 PIF region0 addr configuration register
sourcepub fn core_1_area_pif_1_min(&self) -> &Reg<CORE_1_AREA_PIF_1_MIN_SPEC>
pub fn core_1_area_pif_1_min(&self) -> &Reg<CORE_1_AREA_PIF_1_MIN_SPEC>
0xb8 - Core1 PIF region1 addr configuration register
sourcepub fn core_1_area_pif_1_max(&self) -> &Reg<CORE_1_AREA_PIF_1_MAX_SPEC>
pub fn core_1_area_pif_1_max(&self) -> &Reg<CORE_1_AREA_PIF_1_MAX_SPEC>
0xbc - Core1 PIF region1 addr configuration register
sourcepub fn core_1_area_pc(&self) -> &Reg<CORE_1_AREA_PC_SPEC>
pub fn core_1_area_pc(&self) -> &Reg<CORE_1_AREA_PC_SPEC>
0xc0 - Core1 area sp status register
sourcepub fn core_1_area_sp(&self) -> &Reg<CORE_1_AREA_SP_SPEC>
pub fn core_1_area_sp(&self) -> &Reg<CORE_1_AREA_SP_SPEC>
0xc4 - Core1 area pc status register
sourcepub fn core_1_sp_unstable(&self) -> &Reg<CORE_1_SP_UNSTABLE_SPEC>
pub fn core_1_sp_unstable(&self) -> &Reg<CORE_1_SP_UNSTABLE_SPEC>
0xc8 - Core1 sp unstable configuration register
sourcepub fn core_1_sp_min(&self) -> &Reg<CORE_1_SP_MIN_SPEC>
pub fn core_1_sp_min(&self) -> &Reg<CORE_1_SP_MIN_SPEC>
0xcc - Core1 sp region configuration regsiter
sourcepub fn core_1_sp_max(&self) -> &Reg<CORE_1_SP_MAX_SPEC>
pub fn core_1_sp_max(&self) -> &Reg<CORE_1_SP_MAX_SPEC>
0xd0 - Core1 sp region configuration regsiter
sourcepub fn core_1_sp_pc(&self) -> &Reg<CORE_1_SP_PC_SPEC>
pub fn core_1_sp_pc(&self) -> &Reg<CORE_1_SP_PC_SPEC>
0xd4 - Core1 sp pc status register
sourcepub fn core_1_rcd_pdebugenable(&self) -> &Reg<CORE_1_RCD_PDEBUGENABLE_SPEC>
pub fn core_1_rcd_pdebugenable(&self) -> &Reg<CORE_1_RCD_PDEBUGENABLE_SPEC>
0xd8 - Core1 pdebug configuration register
sourcepub fn core_1_rcd_recording(&self) -> &Reg<CORE_1_RCD_RECORDING_SPEC>
pub fn core_1_rcd_recording(&self) -> &Reg<CORE_1_RCD_RECORDING_SPEC>
0xdc - Core1 pdebug status register
sourcepub fn core_1_rcd_pdebuginst(&self) -> &Reg<CORE_1_RCD_PDEBUGINST_SPEC>
pub fn core_1_rcd_pdebuginst(&self) -> &Reg<CORE_1_RCD_PDEBUGINST_SPEC>
0xe0 - Core1 pdebug status register
sourcepub fn core_1_rcd_pdebugstatus(&self) -> &Reg<CORE_1_RCD_PDEBUGSTATUS_SPEC>
pub fn core_1_rcd_pdebugstatus(&self) -> &Reg<CORE_1_RCD_PDEBUGSTATUS_SPEC>
0xe4 - Core1 pdebug status register
sourcepub fn core_1_rcd_pdebugdata(&self) -> &Reg<CORE_1_RCD_PDEBUGDATA_SPEC>
pub fn core_1_rcd_pdebugdata(&self) -> &Reg<CORE_1_RCD_PDEBUGDATA_SPEC>
0xe8 - Core1 pdebug status register
sourcepub fn core_1_rcd_pdebugpc(&self) -> &Reg<CORE_1_RCD_PDEBUGPC_SPEC>
pub fn core_1_rcd_pdebugpc(&self) -> &Reg<CORE_1_RCD_PDEBUGPC_SPEC>
0xec - Core1 pdebug status register
sourcepub fn core_1_rcd_pdebugls0stat(&self) -> &Reg<CORE_1_RCD_PDEBUGLS0STAT_SPEC>
pub fn core_1_rcd_pdebugls0stat(&self) -> &Reg<CORE_1_RCD_PDEBUGLS0STAT_SPEC>
0xf0 - Core1 pdebug status register
sourcepub fn core_1_rcd_pdebugls0addr(&self) -> &Reg<CORE_1_RCD_PDEBUGLS0ADDR_SPEC>
pub fn core_1_rcd_pdebugls0addr(&self) -> &Reg<CORE_1_RCD_PDEBUGLS0ADDR_SPEC>
0xf4 - Core1 pdebug status register
sourcepub fn core_1_rcd_pdebugls0data(&self) -> &Reg<CORE_1_RCD_PDEBUGLS0DATA_SPEC>
pub fn core_1_rcd_pdebugls0data(&self) -> &Reg<CORE_1_RCD_PDEBUGLS0DATA_SPEC>
0xf8 - Core1 pdebug status register
sourcepub fn core_1_rcd_sp(&self) -> &Reg<CORE_1_RCD_SP_SPEC>
pub fn core_1_rcd_sp(&self) -> &Reg<CORE_1_RCD_SP_SPEC>
0xfc - Core1 pdebug status register
sourcepub fn core_1_iram0_exception_monitor_0(
&self
) -> &Reg<CORE_1_IRAM0_EXCEPTION_MONITOR_0_SPEC>
pub fn core_1_iram0_exception_monitor_0( &self ) -> &Reg<CORE_1_IRAM0_EXCEPTION_MONITOR_0_SPEC>
0x100 - Core1 bus busy status regsiter
sourcepub fn core_1_iram0_exception_monitor_1(
&self
) -> &Reg<CORE_1_IRAM0_EXCEPTION_MONITOR_1_SPEC>
pub fn core_1_iram0_exception_monitor_1( &self ) -> &Reg<CORE_1_IRAM0_EXCEPTION_MONITOR_1_SPEC>
0x104 - Core1 bus busy status regsiter
sourcepub fn core_1_dram0_exception_monitor_0(
&self
) -> &Reg<CORE_1_DRAM0_EXCEPTION_MONITOR_0_SPEC>
pub fn core_1_dram0_exception_monitor_0( &self ) -> &Reg<CORE_1_DRAM0_EXCEPTION_MONITOR_0_SPEC>
0x108 - Core1 bus busy status regsiter
sourcepub fn core_1_dram0_exception_monitor_1(
&self
) -> &Reg<CORE_1_DRAM0_EXCEPTION_MONITOR_1_SPEC>
pub fn core_1_dram0_exception_monitor_1( &self ) -> &Reg<CORE_1_DRAM0_EXCEPTION_MONITOR_1_SPEC>
0x10c - Core1 bus busy status regsiter
sourcepub fn core_1_dram0_exception_monitor_2(
&self
) -> &Reg<CORE_1_DRAM0_EXCEPTION_MONITOR_2_SPEC>
pub fn core_1_dram0_exception_monitor_2( &self ) -> &Reg<CORE_1_DRAM0_EXCEPTION_MONITOR_2_SPEC>
0x110 - Core1 bus busy status regsiter
sourcepub fn core_1_dram0_exception_monitor_3(
&self
) -> &Reg<CORE_1_DRAM0_EXCEPTION_MONITOR_3_SPEC>
pub fn core_1_dram0_exception_monitor_3( &self ) -> &Reg<CORE_1_DRAM0_EXCEPTION_MONITOR_3_SPEC>
0x114 - Core1 bus busy status regsiter
sourcepub fn core_1_dram0_exception_monitor_4(
&self
) -> &Reg<CORE_1_DRAM0_EXCEPTION_MONITOR_4_SPEC>
pub fn core_1_dram0_exception_monitor_4( &self ) -> &Reg<CORE_1_DRAM0_EXCEPTION_MONITOR_4_SPEC>
0x118 - Core1 bus busy status regsiter
sourcepub fn core_1_dram0_exception_monitor_5(
&self
) -> &Reg<CORE_1_DRAM0_EXCEPTION_MONITOR_5_SPEC>
pub fn core_1_dram0_exception_monitor_5( &self ) -> &Reg<CORE_1_DRAM0_EXCEPTION_MONITOR_5_SPEC>
0x11c - Core1 bus busy status regsiter
sourcepub fn core_x_iram0_dram0_exception_monitor_0(
&self
) -> &Reg<CORE_X_IRAM0_DRAM0_EXCEPTION_MONITOR_0_SPEC>
pub fn core_x_iram0_dram0_exception_monitor_0( &self ) -> &Reg<CORE_X_IRAM0_DRAM0_EXCEPTION_MONITOR_0_SPEC>
0x120 - bus busy configuration register
sourcepub fn core_x_iram0_dram0_exception_monitor_1(
&self
) -> &Reg<CORE_X_IRAM0_DRAM0_EXCEPTION_MONITOR_1_SPEC>
pub fn core_x_iram0_dram0_exception_monitor_1( &self ) -> &Reg<CORE_X_IRAM0_DRAM0_EXCEPTION_MONITOR_1_SPEC>
0x124 - bus busy configuration register
sourcepub fn log_setting(&self) -> &Reg<LOG_SETTING_SPEC>
pub fn log_setting(&self) -> &Reg<LOG_SETTING_SPEC>
0x128 - log set register
sourcepub fn log_data_0(&self) -> &Reg<LOG_DATA_0_SPEC>
pub fn log_data_0(&self) -> &Reg<LOG_DATA_0_SPEC>
0x12c - log check data register
sourcepub fn log_data_1(&self) -> &Reg<LOG_DATA_1_SPEC>
pub fn log_data_1(&self) -> &Reg<LOG_DATA_1_SPEC>
0x130 - log check data register
sourcepub fn log_data_2(&self) -> &Reg<LOG_DATA_2_SPEC>
pub fn log_data_2(&self) -> &Reg<LOG_DATA_2_SPEC>
0x134 - log check data register
sourcepub fn log_data_3(&self) -> &Reg<LOG_DATA_3_SPEC>
pub fn log_data_3(&self) -> &Reg<LOG_DATA_3_SPEC>
0x138 - log check data register
sourcepub fn log_data_mask(&self) -> &Reg<LOG_DATA_MASK_SPEC>
pub fn log_data_mask(&self) -> &Reg<LOG_DATA_MASK_SPEC>
0x13c - log check data mask register
sourcepub fn log_min(&self) -> &Reg<LOG_MIN_SPEC>
pub fn log_min(&self) -> &Reg<LOG_MIN_SPEC>
0x140 - log check region configuration register
sourcepub fn log_max(&self) -> &Reg<LOG_MAX_SPEC>
pub fn log_max(&self) -> &Reg<LOG_MAX_SPEC>
0x144 - log check region configuration register
sourcepub fn log_mem_start(&self) -> &Reg<LOG_MEM_START_SPEC>
pub fn log_mem_start(&self) -> &Reg<LOG_MEM_START_SPEC>
0x148 - log mem region configuration register
sourcepub fn log_mem_end(&self) -> &Reg<LOG_MEM_END_SPEC>
pub fn log_mem_end(&self) -> &Reg<LOG_MEM_END_SPEC>
0x14c - log mem region configuration register
sourcepub fn log_mem_writing_addr(&self) -> &Reg<LOG_MEM_WRITING_ADDR_SPEC>
pub fn log_mem_writing_addr(&self) -> &Reg<LOG_MEM_WRITING_ADDR_SPEC>
0x150 - log mem addr status register
sourcepub fn log_mem_full_flag(&self) -> &Reg<LOG_MEM_FULL_FLAG_SPEC>
pub fn log_mem_full_flag(&self) -> &Reg<LOG_MEM_FULL_FLAG_SPEC>
0x154 - log mem status register