Struct esp32s3_hal::pac::spi1::misc::W
pub struct W(_);
Expand description
Register MISC
writer
Implementations§
§impl W
impl W
pub fn cs0_dis(&mut self) -> BitWriterRaw<'_, u32, MISC_SPEC, bool, BitM, 0>
pub fn cs0_dis(&mut self) -> BitWriterRaw<'_, u32, MISC_SPEC, bool, BitM, 0>
Bit 0 - Set this bit to raise high SPI_CS pin, which means that the SPI device(flash) connected to SPI_CS is in low level when SPI1 transfer starts.
pub fn cs1_dis(&mut self) -> BitWriterRaw<'_, u32, MISC_SPEC, bool, BitM, 1>
pub fn cs1_dis(&mut self) -> BitWriterRaw<'_, u32, MISC_SPEC, bool, BitM, 1>
Bit 1 - Set this bit to raise high SPI_CS1 pin, which means that the SPI device(Ext_RAM) connected to SPI_CS1 is in low level when SPI1 transfer starts.
pub fn ck_idle_edge(
&mut self
) -> BitWriterRaw<'_, u32, MISC_SPEC, bool, BitM, 9>
pub fn ck_idle_edge(
&mut self
) -> BitWriterRaw<'_, u32, MISC_SPEC, bool, BitM, 9>
Bit 9 - 1: SPI_CLK line is high when MSPI is idle. 0: SPI_CLK line is low when MSPI is idle.
pub fn cs_keep_active(
&mut self
) -> BitWriterRaw<'_, u32, MISC_SPEC, bool, BitM, 10>
pub fn cs_keep_active(
&mut self
) -> BitWriterRaw<'_, u32, MISC_SPEC, bool, BitM, 10>
Bit 10 - SPI_CS line keep low when the bit is set.
Methods from Deref<Target = W<MISC_SPEC>>§
pub unsafe fn bits(&mut self, bits: <REG as RegisterSpec>::Ux) -> &mut W<REG>
pub unsafe fn bits(&mut self, bits: <REG as RegisterSpec>::Ux) -> &mut W<REG>
Writes raw bits to the register.
Safety
Read datasheet or reference manual to find what values are allowed to pass.