Struct esp32s3_hal::pac::uhci0::hung_conf::R
pub struct R(_);
Expand description
Register HUNG_CONF
reader
Implementations§
§impl R
impl R
pub fn txfifo_timeout(&self) -> FieldReaderRaw<u8, u8>
pub fn txfifo_timeout(&self) -> FieldReaderRaw<u8, u8>
Bits 0:7 - This register stores the timeout value. It will produce the UHCI_TX_HUNG_INT interrupt when DMA takes more time to receive data.
pub fn txfifo_timeout_shift(&self) -> FieldReaderRaw<u8, u8>
pub fn txfifo_timeout_shift(&self) -> FieldReaderRaw<u8, u8>
Bits 8:10 - This register is used to configure the tick count maximum value.
pub fn txfifo_timeout_ena(&self) -> BitReaderRaw<bool>
pub fn txfifo_timeout_ena(&self) -> BitReaderRaw<bool>
Bit 11 - This is the enable bit for Tx-FIFO receive-data timeout.
pub fn rxfifo_timeout(&self) -> FieldReaderRaw<u8, u8>
pub fn rxfifo_timeout(&self) -> FieldReaderRaw<u8, u8>
Bits 12:19 - This register stores the timeout value. It will produce the UHCI_RX_HUNG_INT interrupt when DMA takes more time to read data from RAM.
pub fn rxfifo_timeout_shift(&self) -> FieldReaderRaw<u8, u8>
pub fn rxfifo_timeout_shift(&self) -> FieldReaderRaw<u8, u8>
Bits 20:22 - This register is used to configure the tick count maximum value.
pub fn rxfifo_timeout_ena(&self) -> BitReaderRaw<bool>
pub fn rxfifo_timeout_ena(&self) -> BitReaderRaw<bool>
Bit 23 - This is the enable bit for DMA send-data timeout.
Methods from Deref<Target = R<HUNG_CONF_SPEC>>§
pub fn bits(&self) -> <REG as RegisterSpec>::Ux
pub fn bits(&self) -> <REG as RegisterSpec>::Ux
Reads raw bits from register.
Trait Implementations§
§impl From<R<HUNG_CONF_SPEC>> for R
impl From<R<HUNG_CONF_SPEC>> for R
§fn from(reader: R<HUNG_CONF_SPEC>) -> R
fn from(reader: R<HUNG_CONF_SPEC>) -> R
Converts to this type from the input type.