Struct esp32s3_hal::pac::uhci0::conf1::R
pub struct R(_);
Expand description
Register CONF1
reader
Implementations§
§impl R
impl R
pub fn check_sum_en(&self) -> BitReaderRaw<bool>
pub fn check_sum_en(&self) -> BitReaderRaw<bool>
Bit 0 - This is the enable bit to check header checksum when UHCI receives a data packet.
pub fn check_seq_en(&self) -> BitReaderRaw<bool>
pub fn check_seq_en(&self) -> BitReaderRaw<bool>
Bit 1 - This is the enable bit to check sequence number when UHCI receives a data packet.
pub fn crc_disable(&self) -> BitReaderRaw<bool>
pub fn crc_disable(&self) -> BitReaderRaw<bool>
Bit 2 - Set this bit to support CRC calculation. Data Integrity Check Present bit in UHCI packet frame should be 1.
pub fn save_head(&self) -> BitReaderRaw<bool>
pub fn save_head(&self) -> BitReaderRaw<bool>
Bit 3 - Set this bit to save the packet header when HCI receives a data packet.
pub fn tx_check_sum_re(&self) -> BitReaderRaw<bool>
pub fn tx_check_sum_re(&self) -> BitReaderRaw<bool>
Bit 4 - Set this bit to encode the data packet with a checksum.
pub fn tx_ack_num_re(&self) -> BitReaderRaw<bool>
pub fn tx_ack_num_re(&self) -> BitReaderRaw<bool>
Bit 5 - Set this bit to encode the data packet with an acknowledgment when a reliable packet is to be transmit.
pub fn wait_sw_start(&self) -> BitReaderRaw<bool>
pub fn wait_sw_start(&self) -> BitReaderRaw<bool>
Bit 7 - The uhci-encoder will jump to ST_SW_WAIT status if this register is set to 1.
Methods from Deref<Target = R<CONF1_SPEC>>§
pub fn bits(&self) -> <REG as RegisterSpec>::Ux
pub fn bits(&self) -> <REG as RegisterSpec>::Ux
Reads raw bits from register.
Trait Implementations§
§impl From<R<CONF1_SPEC>> for R
impl From<R<CONF1_SPEC>> for R
§fn from(reader: R<CONF1_SPEC>) -> R
fn from(reader: R<CONF1_SPEC>) -> R
Converts to this type from the input type.