Struct esp32s3_hal::pac::twai::int_raw::R
pub struct R(_);
Expand description
Register INT_RAW
reader
Implementations§
§impl R
impl R
pub fn rx_int_st(&self) -> BitReaderRaw<bool>
pub fn rx_int_st(&self) -> BitReaderRaw<bool>
Bit 0 - Receive interrupt. If this bit is set to 1, it indicates there are messages to be handled in the RX FIFO.
pub fn tx_int_st(&self) -> BitReaderRaw<bool>
pub fn tx_int_st(&self) -> BitReaderRaw<bool>
Bit 1 - Transmit interrupt. If this bit is set to 1, it indicates the message transmitting mis- sion is finished and a new transmission is able to execute.
pub fn err_warn_int_st(&self) -> BitReaderRaw<bool>
pub fn err_warn_int_st(&self) -> BitReaderRaw<bool>
Bit 2 - Error warning interrupt. If this bit is set to 1, it indicates the error status signal and the bus-off status signal of Status register have changed (e.g., switched from 0 to 1 or from 1 to 0).
pub fn overrun_int_st(&self) -> BitReaderRaw<bool>
pub fn overrun_int_st(&self) -> BitReaderRaw<bool>
Bit 3 - Data overrun interrupt. If this bit is set to 1, it indicates a data overrun interrupt is generated in the RX FIFO.
pub fn err_passive_int_st(&self) -> BitReaderRaw<bool>
pub fn err_passive_int_st(&self) -> BitReaderRaw<bool>
Bit 5 - Error passive interrupt. If this bit is set to 1, it indicates the TWAI Controller is switched between error active status and error passive status due to the change of error counters.
pub fn arb_lost_int_st(&self) -> BitReaderRaw<bool>
pub fn arb_lost_int_st(&self) -> BitReaderRaw<bool>
Bit 6 - Arbitration lost interrupt. If this bit is set to 1, it indicates an arbitration lost interrupt is generated.
pub fn bus_err_int_st(&self) -> BitReaderRaw<bool>
pub fn bus_err_int_st(&self) -> BitReaderRaw<bool>
Bit 7 - Error interrupt. If this bit is set to 1, it indicates an error is detected on the bus.
Methods from Deref<Target = R<INT_RAW_SPEC>>§
pub fn bits(&self) -> <REG as RegisterSpec>::Ux
pub fn bits(&self) -> <REG as RegisterSpec>::Ux
Reads raw bits from register.