Struct esp32s3_hal::pac::spi2::din_num::W

pub struct W(_);

Expand description

Register DIN_NUM writer

Implementations§

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impl W

pub fn din0_num(
&mut self
) -> FieldWriterRaw<'_, u32, DIN_NUM_SPEC, u8, u8, Unsafe, 2, 0>

Bits 0:1 - the input signals are delayed by SPI module clock cycles, 0: delayed by 1 cycle, 1: delayed by 2 cycles,… Can be configured in CONF state.

pub fn din1_num(
&mut self
) -> FieldWriterRaw<'_, u32, DIN_NUM_SPEC, u8, u8, Unsafe, 2, 2>

Bits 2:3 - the input signals are delayed by SPI module clock cycles, 0: delayed by 1 cycle, 1: delayed by 2 cycles,… Can be configured in CONF state.

pub fn din2_num(
&mut self
) -> FieldWriterRaw<'_, u32, DIN_NUM_SPEC, u8, u8, Unsafe, 2, 4>

Bits 4:5 - the input signals are delayed by SPI module clock cycles, 0: delayed by 1 cycle, 1: delayed by 2 cycles,… Can be configured in CONF state.

pub fn din3_num(
&mut self
) -> FieldWriterRaw<'_, u32, DIN_NUM_SPEC, u8, u8, Unsafe, 2, 6>

Bits 6:7 - the input signals are delayed by SPI module clock cycles, 0: delayed by 1 cycle, 1: delayed by 2 cycles,… Can be configured in CONF state.

pub fn din4_num(
&mut self
) -> FieldWriterRaw<'_, u32, DIN_NUM_SPEC, u8, u8, Unsafe, 2, 8>

Bits 8:9 - the input signals are delayed by SPI module clock cycles, 0: delayed by 1 cycle, 1: delayed by 2 cycles,… Can be configured in CONF state.

pub fn din5_num(
&mut self
) -> FieldWriterRaw<'_, u32, DIN_NUM_SPEC, u8, u8, Unsafe, 2, 10>

Bits 10:11 - the input signals are delayed by SPI module clock cycles, 0: delayed by 1 cycle, 1: delayed by 2 cycles,… Can be configured in CONF state.

pub fn din6_num(
&mut self
) -> FieldWriterRaw<'_, u32, DIN_NUM_SPEC, u8, u8, Unsafe, 2, 12>

Bits 12:13 - the input signals are delayed by SPI module clock cycles, 0: delayed by 1 cycle, 1: delayed by 2 cycles,… Can be configured in CONF state.

pub fn din7_num(
&mut self
) -> FieldWriterRaw<'_, u32, DIN_NUM_SPEC, u8, u8, Unsafe, 2, 14>

Bits 14:15 - the input signals are delayed by SPI module clock cycles, 0: delayed by 1 cycle, 1: delayed by 2 cycles,… Can be configured in CONF state.