Struct esp32s3_hal::pac::spi1::user::W
pub struct W(_);
Expand description
Register USER
writer
Implementations§
§impl W
impl W
pub fn ck_out_edge(&mut self) -> BitWriterRaw<'_, u32, USER_SPEC, bool, BitM, 9>
pub fn ck_out_edge(&mut self) -> BitWriterRaw<'_, u32, USER_SPEC, bool, BitM, 9>
Bit 9 - This bit, combined with SPI_MEM_CK_IDLE_EDGE bit, is used to change the clock mode 0~3 of SPI_CLK.
pub fn fwrite_dual(
&mut self
) -> BitWriterRaw<'_, u32, USER_SPEC, bool, BitM, 12>
pub fn fwrite_dual(
&mut self
) -> BitWriterRaw<'_, u32, USER_SPEC, bool, BitM, 12>
Bit 12 - Set this bit to enable 2-bm in DOUT phase in SPI1 write operation.
pub fn fwrite_quad(
&mut self
) -> BitWriterRaw<'_, u32, USER_SPEC, bool, BitM, 13>
pub fn fwrite_quad(
&mut self
) -> BitWriterRaw<'_, u32, USER_SPEC, bool, BitM, 13>
Bit 13 - Set this bit to enable 4-bm in DOUT phase in SPI1 write operation.
pub fn fwrite_dio(&mut self) -> BitWriterRaw<'_, u32, USER_SPEC, bool, BitM, 14>
pub fn fwrite_dio(&mut self) -> BitWriterRaw<'_, u32, USER_SPEC, bool, BitM, 14>
Bit 14 - Set this bit to enable 2-bm in ADDR and DOUT phase in SPI1 write operation.
pub fn fwrite_qio(&mut self) -> BitWriterRaw<'_, u32, USER_SPEC, bool, BitM, 15>
pub fn fwrite_qio(&mut self) -> BitWriterRaw<'_, u32, USER_SPEC, bool, BitM, 15>
Bit 15 - Set this bit to enable 4-bit-mode(4-bm) in ADDR and DOUT phase in SPI1 write operation.
pub fn usr_miso_highpart(
&mut self
) -> BitWriterRaw<'_, u32, USER_SPEC, bool, BitM, 24>
pub fn usr_miso_highpart(
&mut self
) -> BitWriterRaw<'_, u32, USER_SPEC, bool, BitM, 24>
Bit 24 - DIN phase only access to high-part of the buffer SPI_MEM_W8_REG~SPI_MEM_W15_REG. 1: enable 0: disable.
pub fn usr_mosi_highpart(
&mut self
) -> BitWriterRaw<'_, u32, USER_SPEC, bool, BitM, 25>
pub fn usr_mosi_highpart(
&mut self
) -> BitWriterRaw<'_, u32, USER_SPEC, bool, BitM, 25>
Bit 25 - DOUT phase only access to high-part of the buffer SPI_MEM_W8_REG~SPI_MEM_W15_REG. 1: enable 0: disable.
pub fn usr_dummy_idle(
&mut self
) -> BitWriterRaw<'_, u32, USER_SPEC, bool, BitM, 26>
pub fn usr_dummy_idle(
&mut self
) -> BitWriterRaw<'_, u32, USER_SPEC, bool, BitM, 26>
Bit 26 - SPI_CLK is disabled(No clock edges) in DUMMY phase when the bit is enable.
pub fn usr_mosi(&mut self) -> BitWriterRaw<'_, u32, USER_SPEC, bool, BitM, 27>
pub fn usr_mosi(&mut self) -> BitWriterRaw<'_, u32, USER_SPEC, bool, BitM, 27>
Bit 27 - Set this bit to enable the DOUT phase of an write-data operation.
pub fn usr_miso(&mut self) -> BitWriterRaw<'_, u32, USER_SPEC, bool, BitM, 28>
pub fn usr_miso(&mut self) -> BitWriterRaw<'_, u32, USER_SPEC, bool, BitM, 28>
Bit 28 - Set this bit to enable enable the DIN phase of a read-data operation.
pub fn usr_dummy(&mut self) -> BitWriterRaw<'_, u32, USER_SPEC, bool, BitM, 29>
pub fn usr_dummy(&mut self) -> BitWriterRaw<'_, u32, USER_SPEC, bool, BitM, 29>
Bit 29 - Set this bit to enable enable the DUMMY phase of an operation.
pub fn usr_addr(&mut self) -> BitWriterRaw<'_, u32, USER_SPEC, bool, BitM, 30>
pub fn usr_addr(&mut self) -> BitWriterRaw<'_, u32, USER_SPEC, bool, BitM, 30>
Bit 30 - Set this bit to enable enable the ADDR phase of an operation.
pub fn usr_command(
&mut self
) -> BitWriterRaw<'_, u32, USER_SPEC, bool, BitM, 31>
pub fn usr_command(
&mut self
) -> BitWriterRaw<'_, u32, USER_SPEC, bool, BitM, 31>
Bit 31 - Set this bit to enable enable the CMD phase of an operation.
Methods from Deref<Target = W<USER_SPEC>>§
pub unsafe fn bits(&mut self, bits: <REG as RegisterSpec>::Ux) -> &mut W<REG>
pub unsafe fn bits(&mut self, bits: <REG as RegisterSpec>::Ux) -> &mut W<REG>
Writes raw bits to the register.
Safety
Read datasheet or reference manual to find what values are allowed to pass.