Struct esp32s3_hal::pac::spi1::ctrl::R
pub struct R(_);Expand description
Register CTRL reader
Implementations§
§impl R
impl R
pub fn fdummy_out(&self) -> BitReaderRaw<bool>
pub fn fdummy_out(&self) -> BitReaderRaw<bool>
Bit 3 - In the DUMMY phase the signal level of SPI bus is output by the SPI0 controller.
pub fn fdout_oct(&self) -> BitReaderRaw<bool>
pub fn fdout_oct(&self) -> BitReaderRaw<bool>
Bit 4 - Set this bit to enable 8-bit-mode(8-bm) in DOUT phase.
pub fn fdin_oct(&self) -> BitReaderRaw<bool>
pub fn fdin_oct(&self) -> BitReaderRaw<bool>
Bit 5 - Set this bit to enable 8-bit-mode(8-bm) in DIN phase.
pub fn faddr_oct(&self) -> BitReaderRaw<bool>
pub fn faddr_oct(&self) -> BitReaderRaw<bool>
Bit 6 - Set this bit to enable 8-bit-mode(8-bm) in ADDR phase.
pub fn fcmd_dual(&self) -> BitReaderRaw<bool>
pub fn fcmd_dual(&self) -> BitReaderRaw<bool>
Bit 7 - Set this bit to enable 2-bit-mode(2-bm) in CMD phase.
pub fn fcmd_quad(&self) -> BitReaderRaw<bool>
pub fn fcmd_quad(&self) -> BitReaderRaw<bool>
Bit 8 - Set this bit to enable 4-bit-mode(4-bm) in CMD phase.
pub fn fcmd_oct(&self) -> BitReaderRaw<bool>
pub fn fcmd_oct(&self) -> BitReaderRaw<bool>
Bit 9 - Set this bit to enable 8-bit-mode(8-bm) in CMD phase.
pub fn fcs_crc_en(&self) -> BitReaderRaw<bool>
pub fn fcs_crc_en(&self) -> BitReaderRaw<bool>
Bit 10 - For SPI1, initialize crc32 module before writing encrypted data to flash. Active low.
pub fn tx_crc_en(&self) -> BitReaderRaw<bool>
pub fn tx_crc_en(&self) -> BitReaderRaw<bool>
Bit 11 - For SPI1, enable crc32 when writing encrypted data to flash. 1: enable 0:disable
pub fn fastrd_mode(&self) -> BitReaderRaw<bool>
pub fn fastrd_mode(&self) -> BitReaderRaw<bool>
Bit 13 - This bit should be set when SPI_MEM_FREAD_QIO, SPI_MEM_FREAD_DIO, SPI_MEM_FREAD_QUAD or SPI_MEM_FREAD_DUAL is set.
pub fn fread_dual(&self) -> BitReaderRaw<bool>
pub fn fread_dual(&self) -> BitReaderRaw<bool>
Bit 14 - In hardware 0x3B read operation, DIN phase apply 2 signals. 1: enable 0: disable.
pub fn resandres(&self) -> BitReaderRaw<bool>
pub fn resandres(&self) -> BitReaderRaw<bool>
Bit 15 - The Device ID is read out to SPI_MEM_RD_STATUS register, this bit combine with spi_mem_flash_res bit. 1: enable 0: disable.
pub fn q_pol(&self) -> BitReaderRaw<bool>
pub fn q_pol(&self) -> BitReaderRaw<bool>
Bit 18 - The bit is used to set MISO line polarity, 1: high 0, low
pub fn d_pol(&self) -> BitReaderRaw<bool>
pub fn d_pol(&self) -> BitReaderRaw<bool>
Bit 19 - The bit is used to set MOSI line polarity, 1: high 0, low
pub fn fread_quad(&self) -> BitReaderRaw<bool>
pub fn fread_quad(&self) -> BitReaderRaw<bool>
Bit 20 - In hardware 0x6B read operation, DIN phase apply 4 signals(4-bit-mode). 1: enable 0: disable.
pub fn wp(&self) -> BitReaderRaw<bool>
pub fn wp(&self) -> BitReaderRaw<bool>
Bit 21 - Write protect signal output when SPI is idle. 1: output high, 0: output low.
pub fn wrsr_2b(&self) -> BitReaderRaw<bool>
pub fn wrsr_2b(&self) -> BitReaderRaw<bool>
Bit 22 - Two bytes data will be written to status register when it is set. 1: enable 0: disable.
Methods from Deref<Target = R<CTRL_SPEC>>§
pub fn bits(&self) -> <REG as RegisterSpec>::Ux
pub fn bits(&self) -> <REG as RegisterSpec>::Ux
Reads raw bits from register.