Struct esp32s3_hal::pac::spi1::clock::W
pub struct W(_);
Expand description
Register CLOCK
writer
Implementations§
§impl W
impl W
pub fn clkcnt_l(
&mut self
) -> FieldWriterRaw<'_, u32, CLOCK_SPEC, u8, u8, Unsafe, 8, 0>
pub fn clkcnt_l(
&mut self
) -> FieldWriterRaw<'_, u32, CLOCK_SPEC, u8, u8, Unsafe, 8, 0>
Bits 0:7 - It must equal to the value of SPI_MEM_CLKCNT_N.
pub fn clkcnt_h(
&mut self
) -> FieldWriterRaw<'_, u32, CLOCK_SPEC, u8, u8, Unsafe, 8, 8>
pub fn clkcnt_h(
&mut self
) -> FieldWriterRaw<'_, u32, CLOCK_SPEC, u8, u8, Unsafe, 8, 8>
Bits 8:15 - It must be a floor value of ((SPI_MEM_CLKCNT_N+1)/2-1).
pub fn clkcnt_n(
&mut self
) -> FieldWriterRaw<'_, u32, CLOCK_SPEC, u8, u8, Unsafe, 8, 16>
pub fn clkcnt_n(
&mut self
) -> FieldWriterRaw<'_, u32, CLOCK_SPEC, u8, u8, Unsafe, 8, 16>
Bits 16:23 - When SPI1 accesses to flash or Ext_RAM, f_SPI_CLK = f_MSPI_CORE_CLK/(SPI_MEM_CLKCNT_N+1)
pub fn clk_equ_sysclk(
&mut self
) -> BitWriterRaw<'_, u32, CLOCK_SPEC, bool, BitM, 31>
pub fn clk_equ_sysclk(
&mut self
) -> BitWriterRaw<'_, u32, CLOCK_SPEC, bool, BitM, 31>
Bit 31 - When SPI1 access to flash or Ext_RAM, set this bit in 1-division mode, f_SPI_CLK = f_MSPI_CORE_CLK.
Methods from Deref<Target = W<CLOCK_SPEC>>§
pub unsafe fn bits(&mut self, bits: <REG as RegisterSpec>::Ux) -> &mut W<REG>
pub unsafe fn bits(&mut self, bits: <REG as RegisterSpec>::Ux) -> &mut W<REG>
Writes raw bits to the register.
Safety
Read datasheet or reference manual to find what values are allowed to pass.
Trait Implementations§
§impl From<W<CLOCK_SPEC>> for W
impl From<W<CLOCK_SPEC>> for W
§fn from(writer: W<CLOCK_SPEC>) -> W
fn from(writer: W<CLOCK_SPEC>) -> W
Converts to this type from the input type.