Struct esp32s3_hal::pac::spi0::date::W
pub struct W(_);
Expand description
Register DATE
writer
Implementations§
§impl W
impl W
pub fn spi_smem_spiclk_fun_drv(
&mut self
) -> FieldWriterRaw<'_, u32, DATE_SPEC, u8, u8, Unsafe, 2, 0>
pub fn spi_smem_spiclk_fun_drv(
&mut self
) -> FieldWriterRaw<'_, u32, DATE_SPEC, u8, u8, Unsafe, 2, 0>
Bits 0:1 - The driver of SPI_CLK PAD is controlled by the bits SPI_SMEM_SPICLK_FUN_DRV[1:0] when the bit SPI_SPICLK_PAD_DRV_CTL_EN is set and MSPI accesses to external RAM.
pub fn spi_fmem_spiclk_fun_drv(
&mut self
) -> FieldWriterRaw<'_, u32, DATE_SPEC, u8, u8, Unsafe, 2, 2>
pub fn spi_fmem_spiclk_fun_drv(
&mut self
) -> FieldWriterRaw<'_, u32, DATE_SPEC, u8, u8, Unsafe, 2, 2>
Bits 2:3 - The driver of SPI_CLK PAD is controlled by the bits SPI_FMEM_SPICLK_FUN_DRV[1:0] when the bit SPI_SPICLK_PAD_DRV_CTL_EN is set and MSPI accesses to flash.
pub fn spi_spiclk_pad_drv_ctl_en(
&mut self
) -> BitWriterRaw<'_, u32, DATE_SPEC, bool, BitM, 4>
pub fn spi_spiclk_pad_drv_ctl_en(
&mut self
) -> BitWriterRaw<'_, u32, DATE_SPEC, bool, BitM, 4>
Bit 4 - SPI_CLK PAD driver control signal. 1: The driver of SPI_CLK PAD is controlled by the bits SPI_FMEM_SPICLK_FUN_DRV[1:0] and SPI_SMEM_SPICLK_FUN_DRV[1:0]. 0: The driver of SPI_CLK PAD is controlled by the bits IO_MUX_FUNC_DRV[1:0] of SPICLK PAD.
Methods from Deref<Target = W<DATE_SPEC>>§
pub unsafe fn bits(&mut self, bits: <REG as RegisterSpec>::Ux) -> &mut W<REG>
pub unsafe fn bits(&mut self, bits: <REG as RegisterSpec>::Ux) -> &mut W<REG>
Writes raw bits to the register.
Safety
Read datasheet or reference manual to find what values are allowed to pass.