Struct esp32s3_hal::pac::rmt::sys_conf::R

pub struct R(_);

Register SYS_CONF reader

Implementations

impl R

pub fn apb_fifo_mask(&self) -> BitReaderRaw<bool>

Bit 0 - 1’h1: access memory directly. 1’h0: access memory by FIFO.

pub fn mem_clk_force_on(&self) -> BitReaderRaw<bool>

Bit 1 - Set this bit to enable the clock for RMT memory.

pub fn mem_force_pd(&self) -> BitReaderRaw<bool>

Bit 2 - Set this bit to power down RMT memory.

pub fn mem_force_pu(&self) -> BitReaderRaw<bool>

Bit 3 - 1: Disable RMT memory light sleep power down function. 0: Power down RMT memory when RMT is in light sleep mode.

pub fn sclk_div_num(&self) -> FieldReaderRaw<u8, u8>

Bits 4:11 - the integral part of the fractional divisor

pub fn sclk_div_a(&self) -> FieldReaderRaw<u8, u8>

Bits 12:17 - the numerator of the fractional part of the fractional divisor

pub fn sclk_div_b(&self) -> FieldReaderRaw<u8, u8>

Bits 18:23 - the denominator of the fractional part of the fractional divisor

pub fn sclk_sel(&self) -> FieldReaderRaw<u8, u8>

Bits 24:25 - choose the clock source of rmt_sclk. 1:CLK_80Mhz;2:CLK_8MHz; 2:XTAL

pub fn sclk_active(&self) -> BitReaderRaw<bool>

Bit 26 - rmt_sclk switch

pub fn clk_en(&self) -> BitReaderRaw<bool>

Bit 31 - RMT register clock gate enable signal. 1: Power up the drive clock of registers. 0: Power down the drive clock of registers

Methods from Deref<Target = R<SYS_CONF_SPEC>>

pub fn bits(&self) -> <REG as RegisterSpec>::Ux

Reads raw bits from register.

Trait Implementations

impl Deref for R

type Target = R<SYS_CONF_SPEC>

The resulting type after dereferencing.

fn deref(&self) -> &<R as Deref>::Target

Dereferences the value.

impl From<R<SYS_CONF_SPEC>> for R

fn from(reader: R<SYS_CONF_SPEC>) -> R

Converts to this type from the input type.