Struct esp32s3_hal::pac::rmt::int_clr::W
pub struct W(_);
Expand description
Register INT_CLR
writer
Implementations§
§impl W
impl W
pub unsafe fn ch_tx_end_int_clr<const O: u8>(
&mut self
) -> BitWriterRaw<'_, u32, INT_CLR_SPEC, bool, BitM, O>
pub unsafe fn ch_tx_end_int_clr<const O: u8>(
&mut self
) -> BitWriterRaw<'_, u32, INT_CLR_SPEC, bool, BitM, O>
Set this bit to clear theCH[0-3]_TX_END_INT interrupt.
pub fn ch0_tx_end_int_clr(
&mut self
) -> BitWriterRaw<'_, u32, INT_CLR_SPEC, bool, BitM, 0>
pub fn ch0_tx_end_int_clr(
&mut self
) -> BitWriterRaw<'_, u32, INT_CLR_SPEC, bool, BitM, 0>
Bit 0 - Set this bit to clear theCH0_TX_END_INT interrupt.
pub fn ch1_tx_end_int_clr(
&mut self
) -> BitWriterRaw<'_, u32, INT_CLR_SPEC, bool, BitM, 1>
pub fn ch1_tx_end_int_clr(
&mut self
) -> BitWriterRaw<'_, u32, INT_CLR_SPEC, bool, BitM, 1>
Bit 1 - Set this bit to clear theCH1_TX_END_INT interrupt.
pub fn ch2_tx_end_int_clr(
&mut self
) -> BitWriterRaw<'_, u32, INT_CLR_SPEC, bool, BitM, 2>
pub fn ch2_tx_end_int_clr(
&mut self
) -> BitWriterRaw<'_, u32, INT_CLR_SPEC, bool, BitM, 2>
Bit 2 - Set this bit to clear theCH2_TX_END_INT interrupt.
pub fn ch3_tx_end_int_clr(
&mut self
) -> BitWriterRaw<'_, u32, INT_CLR_SPEC, bool, BitM, 3>
pub fn ch3_tx_end_int_clr(
&mut self
) -> BitWriterRaw<'_, u32, INT_CLR_SPEC, bool, BitM, 3>
Bit 3 - Set this bit to clear theCH3_TX_END_INT interrupt.
pub unsafe fn ch_tx_err_int_clr<const O: u8>(
&mut self
) -> BitWriterRaw<'_, u32, INT_CLR_SPEC, bool, BitM, O>
pub unsafe fn ch_tx_err_int_clr<const O: u8>(
&mut self
) -> BitWriterRaw<'_, u32, INT_CLR_SPEC, bool, BitM, O>
Set this bit to clear theCH[0-3]_ERR_INT interrupt.
pub fn ch0_tx_err_int_clr(
&mut self
) -> BitWriterRaw<'_, u32, INT_CLR_SPEC, bool, BitM, 4>
pub fn ch0_tx_err_int_clr(
&mut self
) -> BitWriterRaw<'_, u32, INT_CLR_SPEC, bool, BitM, 4>
Bit 4 - Set this bit to clear theCH0_ERR_INT interrupt.
pub fn ch1_tx_err_int_clr(
&mut self
) -> BitWriterRaw<'_, u32, INT_CLR_SPEC, bool, BitM, 5>
pub fn ch1_tx_err_int_clr(
&mut self
) -> BitWriterRaw<'_, u32, INT_CLR_SPEC, bool, BitM, 5>
Bit 5 - Set this bit to clear theCH1_ERR_INT interrupt.
pub fn ch2_tx_err_int_clr(
&mut self
) -> BitWriterRaw<'_, u32, INT_CLR_SPEC, bool, BitM, 6>
pub fn ch2_tx_err_int_clr(
&mut self
) -> BitWriterRaw<'_, u32, INT_CLR_SPEC, bool, BitM, 6>
Bit 6 - Set this bit to clear theCH2_ERR_INT interrupt.
pub fn ch3_tx_err_int_clr(
&mut self
) -> BitWriterRaw<'_, u32, INT_CLR_SPEC, bool, BitM, 7>
pub fn ch3_tx_err_int_clr(
&mut self
) -> BitWriterRaw<'_, u32, INT_CLR_SPEC, bool, BitM, 7>
Bit 7 - Set this bit to clear theCH3_ERR_INT interrupt.
pub unsafe fn ch_tx_thr_event_int_clr<const O: u8>(
&mut self
) -> BitWriterRaw<'_, u32, INT_CLR_SPEC, bool, BitM, O>
pub unsafe fn ch_tx_thr_event_int_clr<const O: u8>(
&mut self
) -> BitWriterRaw<'_, u32, INT_CLR_SPEC, bool, BitM, O>
Set this bit to clear theCH[0-3]_TX_THR_EVENT_INT interrupt.
pub fn ch0_tx_thr_event_int_clr(
&mut self
) -> BitWriterRaw<'_, u32, INT_CLR_SPEC, bool, BitM, 8>
pub fn ch0_tx_thr_event_int_clr(
&mut self
) -> BitWriterRaw<'_, u32, INT_CLR_SPEC, bool, BitM, 8>
Bit 8 - Set this bit to clear theCH0_TX_THR_EVENT_INT interrupt.
pub fn ch1_tx_thr_event_int_clr(
&mut self
) -> BitWriterRaw<'_, u32, INT_CLR_SPEC, bool, BitM, 9>
pub fn ch1_tx_thr_event_int_clr(
&mut self
) -> BitWriterRaw<'_, u32, INT_CLR_SPEC, bool, BitM, 9>
Bit 9 - Set this bit to clear theCH1_TX_THR_EVENT_INT interrupt.
pub fn ch2_tx_thr_event_int_clr(
&mut self
) -> BitWriterRaw<'_, u32, INT_CLR_SPEC, bool, BitM, 10>
pub fn ch2_tx_thr_event_int_clr(
&mut self
) -> BitWriterRaw<'_, u32, INT_CLR_SPEC, bool, BitM, 10>
Bit 10 - Set this bit to clear theCH2_TX_THR_EVENT_INT interrupt.
pub fn ch3_tx_thr_event_int_clr(
&mut self
) -> BitWriterRaw<'_, u32, INT_CLR_SPEC, bool, BitM, 11>
pub fn ch3_tx_thr_event_int_clr(
&mut self
) -> BitWriterRaw<'_, u32, INT_CLR_SPEC, bool, BitM, 11>
Bit 11 - Set this bit to clear theCH3_TX_THR_EVENT_INT interrupt.
pub unsafe fn ch_tx_loop_int_clr<const O: u8>(
&mut self
) -> BitWriterRaw<'_, u32, INT_CLR_SPEC, bool, BitM, O>
pub unsafe fn ch_tx_loop_int_clr<const O: u8>(
&mut self
) -> BitWriterRaw<'_, u32, INT_CLR_SPEC, bool, BitM, O>
Set this bit to clear theCH[0-3]_TX_LOOP_INT interrupt.
pub fn ch0_tx_loop_int_clr(
&mut self
) -> BitWriterRaw<'_, u32, INT_CLR_SPEC, bool, BitM, 12>
pub fn ch0_tx_loop_int_clr(
&mut self
) -> BitWriterRaw<'_, u32, INT_CLR_SPEC, bool, BitM, 12>
Bit 12 - Set this bit to clear theCH0_TX_LOOP_INT interrupt.
pub fn ch1_tx_loop_int_clr(
&mut self
) -> BitWriterRaw<'_, u32, INT_CLR_SPEC, bool, BitM, 13>
pub fn ch1_tx_loop_int_clr(
&mut self
) -> BitWriterRaw<'_, u32, INT_CLR_SPEC, bool, BitM, 13>
Bit 13 - Set this bit to clear theCH1_TX_LOOP_INT interrupt.
pub fn ch2_tx_loop_int_clr(
&mut self
) -> BitWriterRaw<'_, u32, INT_CLR_SPEC, bool, BitM, 14>
pub fn ch2_tx_loop_int_clr(
&mut self
) -> BitWriterRaw<'_, u32, INT_CLR_SPEC, bool, BitM, 14>
Bit 14 - Set this bit to clear theCH2_TX_LOOP_INT interrupt.
pub fn ch3_tx_loop_int_clr(
&mut self
) -> BitWriterRaw<'_, u32, INT_CLR_SPEC, bool, BitM, 15>
pub fn ch3_tx_loop_int_clr(
&mut self
) -> BitWriterRaw<'_, u32, INT_CLR_SPEC, bool, BitM, 15>
Bit 15 - Set this bit to clear theCH3_TX_LOOP_INT interrupt.
pub unsafe fn ch_rx_end_int_clr<const O: u8>(
&mut self
) -> BitWriterRaw<'_, u32, INT_CLR_SPEC, bool, BitM, O>
pub unsafe fn ch_rx_end_int_clr<const O: u8>(
&mut self
) -> BitWriterRaw<'_, u32, INT_CLR_SPEC, bool, BitM, O>
Set this bit to clear theCH4_RX_END_INT interrupt.
pub fn ch4_rx_end_int_clr(
&mut self
) -> BitWriterRaw<'_, u32, INT_CLR_SPEC, bool, BitM, 16>
pub fn ch4_rx_end_int_clr(
&mut self
) -> BitWriterRaw<'_, u32, INT_CLR_SPEC, bool, BitM, 16>
Bit 16 - Set this bit to clear theCH4_RX_END_INT interrupt.
pub fn ch5_rx_end_int_clr(
&mut self
) -> BitWriterRaw<'_, u32, INT_CLR_SPEC, bool, BitM, 17>
pub fn ch5_rx_end_int_clr(
&mut self
) -> BitWriterRaw<'_, u32, INT_CLR_SPEC, bool, BitM, 17>
Bit 17 - Set this bit to clear theCH4_RX_END_INT interrupt.
pub fn ch6_rx_end_int_clr(
&mut self
) -> BitWriterRaw<'_, u32, INT_CLR_SPEC, bool, BitM, 18>
pub fn ch6_rx_end_int_clr(
&mut self
) -> BitWriterRaw<'_, u32, INT_CLR_SPEC, bool, BitM, 18>
Bit 18 - Set this bit to clear theCH4_RX_END_INT interrupt.
pub fn ch7_rx_end_int_clr(
&mut self
) -> BitWriterRaw<'_, u32, INT_CLR_SPEC, bool, BitM, 19>
pub fn ch7_rx_end_int_clr(
&mut self
) -> BitWriterRaw<'_, u32, INT_CLR_SPEC, bool, BitM, 19>
Bit 19 - Set this bit to clear theCH4_RX_END_INT interrupt.
pub unsafe fn ch_rx_err_int_clr<const O: u8>(
&mut self
) -> BitWriterRaw<'_, u32, INT_CLR_SPEC, bool, BitM, O>
pub unsafe fn ch_rx_err_int_clr<const O: u8>(
&mut self
) -> BitWriterRaw<'_, u32, INT_CLR_SPEC, bool, BitM, O>
Set this bit to clear theCH4_ERR_INT interrupt.
pub fn chrx_ch4_rx_err_int_clr(
&mut self
) -> BitWriterRaw<'_, u32, INT_CLR_SPEC, bool, BitM, 20>
pub fn chrx_ch4_rx_err_int_clr(
&mut self
) -> BitWriterRaw<'_, u32, INT_CLR_SPEC, bool, BitM, 20>
Bit 20 - Set this bit to clear theCH4_ERR_INT interrupt.
pub fn chrx_ch5_rx_err_int_clr(
&mut self
) -> BitWriterRaw<'_, u32, INT_CLR_SPEC, bool, BitM, 21>
pub fn chrx_ch5_rx_err_int_clr(
&mut self
) -> BitWriterRaw<'_, u32, INT_CLR_SPEC, bool, BitM, 21>
Bit 21 - Set this bit to clear theCH4_ERR_INT interrupt.
pub fn chrx_ch6_rx_err_int_clr(
&mut self
) -> BitWriterRaw<'_, u32, INT_CLR_SPEC, bool, BitM, 22>
pub fn chrx_ch6_rx_err_int_clr(
&mut self
) -> BitWriterRaw<'_, u32, INT_CLR_SPEC, bool, BitM, 22>
Bit 22 - Set this bit to clear theCH4_ERR_INT interrupt.
pub fn chrx_ch7_rx_err_int_clr(
&mut self
) -> BitWriterRaw<'_, u32, INT_CLR_SPEC, bool, BitM, 23>
pub fn chrx_ch7_rx_err_int_clr(
&mut self
) -> BitWriterRaw<'_, u32, INT_CLR_SPEC, bool, BitM, 23>
Bit 23 - Set this bit to clear theCH4_ERR_INT interrupt.
pub fn ch4_rx_thr_event_int_clr(
&mut self
) -> BitWriterRaw<'_, u32, INT_CLR_SPEC, bool, BitM, 24>
pub fn ch4_rx_thr_event_int_clr(
&mut self
) -> BitWriterRaw<'_, u32, INT_CLR_SPEC, bool, BitM, 24>
Bit 24 - Set this bit to clear theCH4_RX_THR_EVENT_INT interrupt.
pub fn ch5_rx_thr_event_int_clr(
&mut self
) -> BitWriterRaw<'_, u32, INT_CLR_SPEC, bool, BitM, 25>
pub fn ch5_rx_thr_event_int_clr(
&mut self
) -> BitWriterRaw<'_, u32, INT_CLR_SPEC, bool, BitM, 25>
Bit 25 - Set this bit to clear theCH5_RX_THR_EVENT_INT interrupt.
pub fn ch6_rx_thr_event_int_clr(
&mut self
) -> BitWriterRaw<'_, u32, INT_CLR_SPEC, bool, BitM, 26>
pub fn ch6_rx_thr_event_int_clr(
&mut self
) -> BitWriterRaw<'_, u32, INT_CLR_SPEC, bool, BitM, 26>
Bit 26 - Set this bit to clear theCH6_RX_THR_EVENT_INT interrupt.
pub fn ch7_rx_thr_event_int_clr(
&mut self
) -> BitWriterRaw<'_, u32, INT_CLR_SPEC, bool, BitM, 27>
pub fn ch7_rx_thr_event_int_clr(
&mut self
) -> BitWriterRaw<'_, u32, INT_CLR_SPEC, bool, BitM, 27>
Bit 27 - Set this bit to clear theCH7_RX_THR_EVENT_INT interrupt.
pub fn tx_ch3_dma_access_fail_int_clr(
&mut self
) -> BitWriterRaw<'_, u32, INT_CLR_SPEC, bool, BitM, 28>
pub fn tx_ch3_dma_access_fail_int_clr(
&mut self
) -> BitWriterRaw<'_, u32, INT_CLR_SPEC, bool, BitM, 28>
Bit 28 - Set this bit to clear the CH3_DMA_ACCESS_FAIL_INT interrupt.
pub fn rx_ch7_dma_access_fail_int_clr(
&mut self
) -> BitWriterRaw<'_, u32, INT_CLR_SPEC, bool, BitM, 29>
pub fn rx_ch7_dma_access_fail_int_clr(
&mut self
) -> BitWriterRaw<'_, u32, INT_CLR_SPEC, bool, BitM, 29>
Bit 29 - Set this bit to clear the CH7_DMA_ACCESS_FAIL_INT interrupt.
Methods from Deref<Target = W<INT_CLR_SPEC>>§
pub unsafe fn bits(&mut self, bits: <REG as RegisterSpec>::Ux) -> &mut W<REG>
pub unsafe fn bits(&mut self, bits: <REG as RegisterSpec>::Ux) -> &mut W<REG>
Writes raw bits to the register.
Safety
Read datasheet or reference manual to find what values are allowed to pass.