Struct esp32s3_hal::pac::pwm0::int_raw::R
pub struct R(_);Expand description
Register INT_RAW reader
Implementations§
§impl R
impl R
pub fn timer0_stop_int_raw(&self) -> BitReaderRaw<bool>
pub fn timer0_stop_int_raw(&self) -> BitReaderRaw<bool>
Bit 0 - The raw status bit for the interrupt triggered when the timer 0 stops.
pub fn timer1_stop_int_raw(&self) -> BitReaderRaw<bool>
pub fn timer1_stop_int_raw(&self) -> BitReaderRaw<bool>
Bit 1 - The raw status bit for the interrupt triggered when the timer 1 stops.
pub fn timer2_stop_int_raw(&self) -> BitReaderRaw<bool>
pub fn timer2_stop_int_raw(&self) -> BitReaderRaw<bool>
Bit 2 - The raw status bit for the interrupt triggered when the timer 2 stops.
pub fn timer0_tez_int_raw(&self) -> BitReaderRaw<bool>
pub fn timer0_tez_int_raw(&self) -> BitReaderRaw<bool>
Bit 3 - The raw status bit for the interrupt triggered by a PWM timer 0 TEZ event.
pub fn timer1_tez_int_raw(&self) -> BitReaderRaw<bool>
pub fn timer1_tez_int_raw(&self) -> BitReaderRaw<bool>
Bit 4 - The raw status bit for the interrupt triggered by a PWM timer 1 TEZ event.
pub fn timer2_tez_int_raw(&self) -> BitReaderRaw<bool>
pub fn timer2_tez_int_raw(&self) -> BitReaderRaw<bool>
Bit 5 - The raw status bit for the interrupt triggered by a PWM timer 2 TEZ event.
pub fn timer0_tep_int_raw(&self) -> BitReaderRaw<bool>
pub fn timer0_tep_int_raw(&self) -> BitReaderRaw<bool>
Bit 6 - The raw status bit for the interrupt triggered by a PWM timer 0 TEP event.
pub fn timer1_tep_int_raw(&self) -> BitReaderRaw<bool>
pub fn timer1_tep_int_raw(&self) -> BitReaderRaw<bool>
Bit 7 - The raw status bit for the interrupt triggered by a PWM timer 1 TEP event.
pub fn timer2_tep_int_raw(&self) -> BitReaderRaw<bool>
pub fn timer2_tep_int_raw(&self) -> BitReaderRaw<bool>
Bit 8 - The raw status bit for the interrupt triggered by a PWM timer 2 TEP event.
pub fn fault0_int_raw(&self) -> BitReaderRaw<bool>
pub fn fault0_int_raw(&self) -> BitReaderRaw<bool>
Bit 9 - The raw status bit for the interrupt triggered when event_f0 starts.
pub fn fault1_int_raw(&self) -> BitReaderRaw<bool>
pub fn fault1_int_raw(&self) -> BitReaderRaw<bool>
Bit 10 - The raw status bit for the interrupt triggered when event_f1 starts.
pub fn fault2_int_raw(&self) -> BitReaderRaw<bool>
pub fn fault2_int_raw(&self) -> BitReaderRaw<bool>
Bit 11 - The raw status bit for the interrupt triggered when event_f2 starts.
pub fn fault0_clr_int_raw(&self) -> BitReaderRaw<bool>
pub fn fault0_clr_int_raw(&self) -> BitReaderRaw<bool>
Bit 12 - The raw status bit for the interrupt triggered when event_f0 ends.
pub fn fault1_clr_int_raw(&self) -> BitReaderRaw<bool>
pub fn fault1_clr_int_raw(&self) -> BitReaderRaw<bool>
Bit 13 - The raw status bit for the interrupt triggered when event_f1 ends.
pub fn fault2_clr_int_raw(&self) -> BitReaderRaw<bool>
pub fn fault2_clr_int_raw(&self) -> BitReaderRaw<bool>
Bit 14 - The raw status bit for the interrupt triggered when event_f2 ends.
pub fn cmpr0_tea_int_raw(&self) -> BitReaderRaw<bool>
pub fn cmpr0_tea_int_raw(&self) -> BitReaderRaw<bool>
Bit 15 - The raw status bit for the interrupt triggered by a PWM operator 0 TEA event
pub fn cmpr1_tea_int_raw(&self) -> BitReaderRaw<bool>
pub fn cmpr1_tea_int_raw(&self) -> BitReaderRaw<bool>
Bit 16 - The raw status bit for the interrupt triggered by a PWM operator 1 TEA event
pub fn cmpr2_tea_int_raw(&self) -> BitReaderRaw<bool>
pub fn cmpr2_tea_int_raw(&self) -> BitReaderRaw<bool>
Bit 17 - The raw status bit for the interrupt triggered by a PWM operator 2 TEA event
pub fn cmpr0_teb_int_raw(&self) -> BitReaderRaw<bool>
pub fn cmpr0_teb_int_raw(&self) -> BitReaderRaw<bool>
Bit 18 - The raw status bit for the interrupt triggered by a PWM operator 0 TEB event
pub fn cmpr1_teb_int_raw(&self) -> BitReaderRaw<bool>
pub fn cmpr1_teb_int_raw(&self) -> BitReaderRaw<bool>
Bit 19 - The raw status bit for the interrupt triggered by a PWM operator 1 TEB event
pub fn cmpr2_teb_int_raw(&self) -> BitReaderRaw<bool>
pub fn cmpr2_teb_int_raw(&self) -> BitReaderRaw<bool>
Bit 20 - The raw status bit for the interrupt triggered by a PWM operator 2 TEB event
pub fn tz0_cbc_int_raw(&self) -> BitReaderRaw<bool>
pub fn tz0_cbc_int_raw(&self) -> BitReaderRaw<bool>
Bit 21 - The raw status bit for the interrupt triggered by a cycle-by-cycle mode action on PWM0.
pub fn tz1_cbc_int_raw(&self) -> BitReaderRaw<bool>
pub fn tz1_cbc_int_raw(&self) -> BitReaderRaw<bool>
Bit 22 - The raw status bit for the interrupt triggered by a cycle-by-cycle mode action on PWM1.
pub fn tz2_cbc_int_raw(&self) -> BitReaderRaw<bool>
pub fn tz2_cbc_int_raw(&self) -> BitReaderRaw<bool>
Bit 23 - The raw status bit for the interrupt triggered by a cycle-by-cycle mode action on PWM2.
pub fn tz0_ost_int_raw(&self) -> BitReaderRaw<bool>
pub fn tz0_ost_int_raw(&self) -> BitReaderRaw<bool>
Bit 24 - The raw status bit for the interrupt triggered by a one-shot mode action on PWM0.
pub fn tz1_ost_int_raw(&self) -> BitReaderRaw<bool>
pub fn tz1_ost_int_raw(&self) -> BitReaderRaw<bool>
Bit 25 - The raw status bit for the interrupt triggered by a one-shot mode action on PWM1.
pub fn tz2_ost_int_raw(&self) -> BitReaderRaw<bool>
pub fn tz2_ost_int_raw(&self) -> BitReaderRaw<bool>
Bit 26 - The raw status bit for the interrupt triggered by a one-shot mode action on PWM2.
pub fn cap0_int_raw(&self) -> BitReaderRaw<bool>
pub fn cap0_int_raw(&self) -> BitReaderRaw<bool>
Bit 27 - The raw status bit for the interrupt triggered by capture on channel 0.
pub fn cap1_int_raw(&self) -> BitReaderRaw<bool>
pub fn cap1_int_raw(&self) -> BitReaderRaw<bool>
Bit 28 - The raw status bit for the interrupt triggered by capture on channel 1.
pub fn cap2_int_raw(&self) -> BitReaderRaw<bool>
pub fn cap2_int_raw(&self) -> BitReaderRaw<bool>
Bit 29 - The raw status bit for the interrupt triggered by capture on channel 2.
Methods from Deref<Target = R<INT_RAW_SPEC>>§
pub fn bits(&self) -> <REG as RegisterSpec>::Ux
pub fn bits(&self) -> <REG as RegisterSpec>::Ux
Reads raw bits from register.