Struct esp32s3_hal::pac::pwm0::cap_timer_cfg::R

pub struct R(_);

Register CAP_TIMER_CFG reader

Implementations

impl R

pub fn cap_timer_en(&self) -> BitReaderRaw<bool>

Bit 0 - When set, capture timer incrementing under APB_clk is enabled.

pub fn cap_synci_en(&self) -> BitReaderRaw<bool>

Bit 1 - When set, capture timer sync is enabled.

pub fn cap_synci_sel(&self) -> FieldReaderRaw<u8, u8>

Bits 2:4 - capture module sync input selection. 0: none, 1: timer0 sync_out, 2: timer1 sync_out, 3: timer2 sync_out, 4: SYNC0 from GPIO matrix, 5: SYNC1 from GPIO matrix, 6: SYNC2 from GPIO matrix

Methods from Deref<Target = R<CAP_TIMER_CFG_SPEC>>

pub fn bits(&self) -> <REG as RegisterSpec>::Ux

Reads raw bits from register.

Trait Implementations

impl Deref for R

type Target = R<CAP_TIMER_CFG_SPEC>

The resulting type after dereferencing.

fn deref(&self) -> &<R as Deref>::Target

Dereferences the value.

impl From<R<CAP_TIMER_CFG_SPEC>> for R

fn from(reader: R<CAP_TIMER_CFG_SPEC>) -> R

Converts to this type from the input type.