Struct esp32s3_hal::pac::pwm0::cap_ch1_cfg::R
pub struct R(_);
Expand description
Register CAP_CH1_CFG
reader
Implementations§
§impl R
impl R
pub fn cap1_mode(&self) -> FieldReaderRaw<u8, u8>
pub fn cap1_mode(&self) -> FieldReaderRaw<u8, u8>
Bits 1:2 - Edge of capture on channel 1 after prescaling. When bit0 is set to 1: enable capture on the negative edge, When bit1 is set to 1: enable capture on the positive edge.
pub fn cap1_prescale(&self) -> FieldReaderRaw<u8, u8>
pub fn cap1_prescale(&self) -> FieldReaderRaw<u8, u8>
Bits 3:10 - Value of prescaling on possitive edge of CAP1. Prescale value = PWM_CAP1_PRESCALE + 1
pub fn cap1_in_invert(&self) -> BitReaderRaw<bool>
pub fn cap1_in_invert(&self) -> BitReaderRaw<bool>
Bit 11 - when set, CAP1 form GPIO matrix is inverted before prescale
Methods from Deref<Target = R<CAP_CH1_CFG_SPEC>>§
pub fn bits(&self) -> <REG as RegisterSpec>::Ux
pub fn bits(&self) -> <REG as RegisterSpec>::Ux
Reads raw bits from register.
Trait Implementations§
§impl From<R<CAP_CH1_CFG_SPEC>> for R
impl From<R<CAP_CH1_CFG_SPEC>> for R
§fn from(reader: R<CAP_CH1_CFG_SPEC>) -> R
fn from(reader: R<CAP_CH1_CFG_SPEC>) -> R
Converts to this type from the input type.