Struct esp32s3_hal::pac::lcd_cam::lcd_dly_mode::R
pub struct R(_);
Expand description
Register LCD_DLY_MODE
reader
Implementations§
§impl R
impl R
pub fn lcd_cd_mode(&self) -> FieldReaderRaw<u8, u8>
pub fn lcd_cd_mode(&self) -> FieldReaderRaw<u8, u8>
Bits 0:1 - The output LCD_CD is delayed by module clock LCD_CLK. 0: output without delayed. 1: delay by the positive edge of LCD_CLK. 2: delay by the negative edge of LCD_CLK.
pub fn lcd_de_mode(&self) -> FieldReaderRaw<u8, u8>
pub fn lcd_de_mode(&self) -> FieldReaderRaw<u8, u8>
Bits 2:3 - The output LCD_DE is delayed by module clock LCD_CLK. 0: output without delayed. 1: delay by the positive edge of LCD_CLK. 2: delay by the negative edge of LCD_CLK.
pub fn lcd_hsync_mode(&self) -> FieldReaderRaw<u8, u8>
pub fn lcd_hsync_mode(&self) -> FieldReaderRaw<u8, u8>
Bits 4:5 - The output LCD_HSYNC is delayed by module clock LCD_CLK. 0: output without delayed. 1: delay by the positive edge of LCD_CLK. 2: delay by the negative edge of LCD_CLK.
pub fn lcd_vsync_mode(&self) -> FieldReaderRaw<u8, u8>
pub fn lcd_vsync_mode(&self) -> FieldReaderRaw<u8, u8>
Bits 6:7 - The output LCD_VSYNC is delayed by module clock LCD_CLK. 0: output without delayed. 1: delay by the positive edge of LCD_CLK. 2: delay by the negative edge of LCD_CLK.
Methods from Deref<Target = R<LCD_DLY_MODE_SPEC>>§
pub fn bits(&self) -> <REG as RegisterSpec>::Ux
pub fn bits(&self) -> <REG as RegisterSpec>::Ux
Reads raw bits from register.