Module esp32s3_hal::pac::lcd_cam::cam_ctrl

Camera configuration register

Structs

CAM_CTRL_SPEC

Camera configuration register

R

Register CAM_CTRL reader

W

Register CAM_CTRL writer

Type Definitions

CAM_BIT_ORDER_R

Field CAM_BIT_ORDER reader - 1: invert data byte order, only valid in 2 byte mode. 0: Not change.

CAM_BIT_ORDER_W

Field CAM_BIT_ORDER writer - 1: invert data byte order, only valid in 2 byte mode. 0: Not change.

CAM_BYTE_ORDER_R

Field CAM_BYTE_ORDER reader - 1: Change data bit order, change CAM_DATA_in[7:0] to CAM_DATA_in[0:7] in one byte mode, and bits[15:0] to bits[0:15] in two byte mode. 0: Not change.

CAM_BYTE_ORDER_W

Field CAM_BYTE_ORDER writer - 1: Change data bit order, change CAM_DATA_in[7:0] to CAM_DATA_in[0:7] in one byte mode, and bits[15:0] to bits[0:15] in two byte mode. 0: Not change.

CAM_CLKM_DIV_A_R

Field CAM_CLKM_DIV_A reader - Fractional clock divider denominator value

CAM_CLKM_DIV_A_W

Field CAM_CLKM_DIV_A writer - Fractional clock divider denominator value

CAM_CLKM_DIV_B_R

Field CAM_CLKM_DIV_B reader - Fractional clock divider numerator value

CAM_CLKM_DIV_B_W

Field CAM_CLKM_DIV_B writer - Fractional clock divider numerator value

CAM_CLKM_DIV_NUM_R

Field CAM_CLKM_DIV_NUM reader - Integral Camera clock divider value

CAM_CLKM_DIV_NUM_W

Field CAM_CLKM_DIV_NUM writer - Integral Camera clock divider value

CAM_CLK_SEL_R

Field CAM_CLK_SEL reader - Select Camera module source clock. 0: no clock. 1: APLL. 2: CLK160. 3: no clock.

CAM_CLK_SEL_W

Field CAM_CLK_SEL writer - Select Camera module source clock. 0: no clock. 1: APLL. 2: CLK160. 3: no clock.

CAM_LINE_INT_EN_R

Field CAM_LINE_INT_EN reader - 1: Enable to generate CAM_HS_INT. 0: Disable.

CAM_LINE_INT_EN_W

Field CAM_LINE_INT_EN writer - 1: Enable to generate CAM_HS_INT. 0: Disable.

CAM_STOP_EN_R

Field CAM_STOP_EN reader - Camera stop enable signal, 1: camera stops when DMA Rx FIFO is full. 0: Not stop.

CAM_STOP_EN_W

Field CAM_STOP_EN writer - Camera stop enable signal, 1: camera stops when DMA Rx FIFO is full. 0: Not stop.

CAM_UPDATE_R

Field CAM_UPDATE reader - 1: Update Camera registers, will be cleared by hardware. 0 : Not care.

CAM_UPDATE_W

Field CAM_UPDATE writer - 1: Update Camera registers, will be cleared by hardware. 0 : Not care.

CAM_VSYNC_FILTER_THRES_R

Field CAM_VSYNC_FILTER_THRES reader - Filter threshold value for CAM_VSYNC signal.

CAM_VSYNC_FILTER_THRES_W

Field CAM_VSYNC_FILTER_THRES writer - Filter threshold value for CAM_VSYNC signal.

CAM_VS_EOF_EN_R

Field CAM_VS_EOF_EN reader - 1: CAM_VSYNC to generate in_suc_eof. 0: in_suc_eof is controlled by reg_cam_rec_data_cyclelen.

CAM_VS_EOF_EN_W

Field CAM_VS_EOF_EN writer - 1: CAM_VSYNC to generate in_suc_eof. 0: in_suc_eof is controlled by reg_cam_rec_data_cyclelen.