Struct esp32s3_hal::pac::i2s0::rx_conf::R
pub struct R(_);Expand description
Register RX_CONF reader
Implementations§
§impl R
impl R
pub fn rx_slave_mod(&self) -> BitReaderRaw<bool>
pub fn rx_slave_mod(&self) -> BitReaderRaw<bool>
Bit 3 - Set this bit to enable slave receiver mode
pub fn rx_big_endian(&self) -> BitReaderRaw<bool>
pub fn rx_big_endian(&self) -> BitReaderRaw<bool>
Bit 7 - I2S Rx byte endian, 1: low addr value to high addr. 0: low addr with low addr value.
pub fn rx_update(&self) -> BitReaderRaw<bool>
pub fn rx_update(&self) -> BitReaderRaw<bool>
Bit 8 - Set 1 to update I2S RX registers from APB clock domain to I2S RX clock domain. This bit will be cleared by hardware after update register done.
pub fn rx_mono_fst_vld(&self) -> BitReaderRaw<bool>
pub fn rx_mono_fst_vld(&self) -> BitReaderRaw<bool>
Bit 9 - 1: The first channel data value is valid in I2S RX mono mode. 0: The second channel data value is valid in I2S RX mono mode.
pub fn rx_pcm_conf(&self) -> FieldReaderRaw<u8, u8>
pub fn rx_pcm_conf(&self) -> FieldReaderRaw<u8, u8>
Bits 10:11 - I2S RX compress/decompress configuration bit. & 0 (atol): A-Law decompress, 1 (ltoa) : A-Law compress, 2 (utol) : u-Law decompress, 3 (ltou) : u-Law compress. &
pub fn rx_pcm_bypass(&self) -> BitReaderRaw<bool>
pub fn rx_pcm_bypass(&self) -> BitReaderRaw<bool>
Bit 12 - Set this bit to bypass Compress/Decompress module for received data.
pub fn rx_stop_mode(&self) -> FieldReaderRaw<u8, u8>
pub fn rx_stop_mode(&self) -> FieldReaderRaw<u8, u8>
Bits 13:14 - 0 : I2S Rx only stop when reg_rx_start is cleared. 1: Stop when reg_rx_start is 0 or in_suc_eof is 1. 2: Stop I2S RX when reg_rx_start is 0 or RX FIFO is full.
pub fn rx_left_align(&self) -> BitReaderRaw<bool>
pub fn rx_left_align(&self) -> BitReaderRaw<bool>
Bit 15 - 1: I2S RX left alignment mode. 0: I2S RX right alignment mode.
pub fn rx_24_fill_en(&self) -> BitReaderRaw<bool>
pub fn rx_24_fill_en(&self) -> BitReaderRaw<bool>
Bit 16 - 1: store 24 channel bits to 32 bits. 0:store 24 channel bits to 24 bits.
pub fn rx_ws_idle_pol(&self) -> BitReaderRaw<bool>
pub fn rx_ws_idle_pol(&self) -> BitReaderRaw<bool>
Bit 17 - 0: WS should be 0 when receiving left channel data, and WS is 1in right channel. 1: WS should be 1 when receiving left channel data, and WS is 0in right channel.
pub fn rx_bit_order(&self) -> BitReaderRaw<bool>
pub fn rx_bit_order(&self) -> BitReaderRaw<bool>
Bit 18 - I2S Rx bit endian. 1:small endian, the LSB is received first. 0:big endian, the MSB is received first.
pub fn rx_pdm2pcm_en(&self) -> BitReaderRaw<bool>
pub fn rx_pdm2pcm_en(&self) -> BitReaderRaw<bool>
Bit 21 - 1: Enable PDM2PCM RX mode. 0: DIsable.
pub fn rx_pdm_sinc_dsr_16_en(&self) -> BitReaderRaw<bool>
pub fn rx_pdm_sinc_dsr_16_en(&self) -> BitReaderRaw<bool>
Bit 22 - Configure the down sampling rate of PDM RX filter group1 module. 1: The down sampling rate is 128. 0: down sampling rate is 64.
Methods from Deref<Target = R<RX_CONF_SPEC>>§
pub fn bits(&self) -> <REG as RegisterSpec>::Ux
pub fn bits(&self) -> <REG as RegisterSpec>::Ux
Reads raw bits from register.