Struct esp32s3_hal::pac::i2c0::sr::R

pub struct R(_);

Expand description

Register SR reader

Implementations§

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impl R

pub fn resp_rec(&self) -> BitReaderRaw<bool>

Bit 0 - The received ACK value in master mode or slave mode. 0: ACK, 1: NACK.

pub fn slave_rw(&self) -> BitReaderRaw<bool>

Bit 1 - When in slave mode, 1: master reads from slave; 0: master writes to slave.

pub fn arb_lost(&self) -> BitReaderRaw<bool>

Bit 3 - When the I2C controller loses control of SCL line, this register changes to 1.

pub fn bus_busy(&self) -> BitReaderRaw<bool>

Bit 4 - 1: the I2C bus is busy transferring data; 0: the I2C bus is in idle state.

pub fn slave_addressed(&self) -> BitReaderRaw<bool>

Bit 5 - When configured as an I2C Slave, and the address sent by the master is equal to the address of the slave, then this bit will be of high level.

pub fn rxfifo_cnt(&self) -> FieldReaderRaw<u8, u8>

Bits 8:13 - This field represents the amount of data needed to be sent.

pub fn stretch_cause(&self) -> FieldReaderRaw<u8, u8>

Bits 14:15 - The cause of stretching SCL low in slave mode. 0: stretching SCL low at the beginning of I2C read data state. 1: stretching SCL low when I2C Tx FIFO is empty in slave mode. 2: stretching SCL low when I2C Rx FIFO is full in slave mode.

pub fn txfifo_cnt(&self) -> FieldReaderRaw<u8, u8>

Bits 18:23 - This field stores the amount of received data in RAM.

pub fn scl_main_state_last(&self) -> FieldReaderRaw<u8, u8>

Bits 24:26 - This field indicates the states of the I2C module state machine. 0: Idle; 1: Address shift; 2: ACK address; 3: Rx data; 4: Tx data; 5: Send ACK; 6: Wait ACK

pub fn scl_state_last(&self) -> FieldReaderRaw<u8, u8>

Bits 28:30 - This field indicates the states of the state machine used to produce SCL. 0: Idle; 1: Start; 2: Negative edge; 3: Low; 4: Positive edge; 5: High; 6: Stop