Struct esp32s3_hal::pac::extmem::icache_freeze::R

pub struct R(_);

Register ICACHE_FREEZE reader

Implementations

impl R

pub fn ena(&self) -> BitReaderRaw<bool>

Bit 0 - The bit is used to enable icache freeze mode

pub fn mode(&self) -> BitReaderRaw<bool>

Bit 1 - The bit is used to configure freeze mode, 0: assert busy if CPU miss 1: assert hit if CPU miss

pub fn done(&self) -> BitReaderRaw<bool>

Bit 2 - The bit is used to indicate icache freeze success

Methods from Deref<Target = R<ICACHE_FREEZE_SPEC>>

pub fn bits(&self) -> <REG as RegisterSpec>::Ux

Reads raw bits from register.

Trait Implementations

impl Deref for R

type Target = R<ICACHE_FREEZE_SPEC>

The resulting type after dereferencing.

fn deref(&self) -> &<R as Deref>::Target

Dereferences the value.

impl From<R<ICACHE_FREEZE_SPEC>> for R

fn from(reader: R<ICACHE_FREEZE_SPEC>) -> R

Converts to this type from the input type.