Struct esp32s3_hal::pac::extmem::cache_conf_misc::W
pub struct W(_);
Expand description
Register CACHE_CONF_MISC
writer
Implementations§
§impl W
impl W
pub fn cache_ignore_preload_mmu_entry_fault(
&mut self
) -> BitWriterRaw<'_, u32, CACHE_CONF_MISC_SPEC, bool, BitM, 0>
pub fn cache_ignore_preload_mmu_entry_fault(
&mut self
) -> BitWriterRaw<'_, u32, CACHE_CONF_MISC_SPEC, bool, BitM, 0>
Bit 0 - The bit is used to disable checking mmu entry fault by preload operation.
pub fn cache_ignore_sync_mmu_entry_fault(
&mut self
) -> BitWriterRaw<'_, u32, CACHE_CONF_MISC_SPEC, bool, BitM, 1>
pub fn cache_ignore_sync_mmu_entry_fault(
&mut self
) -> BitWriterRaw<'_, u32, CACHE_CONF_MISC_SPEC, bool, BitM, 1>
Bit 1 - The bit is used to disable checking mmu entry fault by sync operation.
pub fn cache_trace_ena(
&mut self
) -> BitWriterRaw<'_, u32, CACHE_CONF_MISC_SPEC, bool, BitM, 2>
pub fn cache_trace_ena(
&mut self
) -> BitWriterRaw<'_, u32, CACHE_CONF_MISC_SPEC, bool, BitM, 2>
Bit 2 - The bit is used to enable cache trace function.
Methods from Deref<Target = W<CACHE_CONF_MISC_SPEC>>§
pub unsafe fn bits(&mut self, bits: <REG as RegisterSpec>::Ux) -> &mut W<REG>
pub unsafe fn bits(&mut self, bits: <REG as RegisterSpec>::Ux) -> &mut W<REG>
Writes raw bits to the register.
Safety
Read datasheet or reference manual to find what values are allowed to pass.
Trait Implementations§
§impl From<W<CACHE_CONF_MISC_SPEC>> for W
impl From<W<CACHE_CONF_MISC_SPEC>> for W
§fn from(writer: W<CACHE_CONF_MISC_SPEC>) -> W
fn from(writer: W<CACHE_CONF_MISC_SPEC>) -> W
Converts to this type from the input type.