Struct esp32s3_hal::pac::dma::in_int_raw_ch::R
pub struct R(_);Expand description
Register IN_INT_RAW_CH%s reader
Implementations§
§impl R
impl R
pub fn in_done(&self) -> BitReaderRaw<bool>
pub fn in_done(&self) -> BitReaderRaw<bool>
Bit 0 - The raw interrupt bit turns to high level when the last data pointed by one inlink descriptor has been received for Rx channel 0.
pub fn in_suc_eof(&self) -> BitReaderRaw<bool>
pub fn in_suc_eof(&self) -> BitReaderRaw<bool>
Bit 1 - The raw interrupt bit turns to high level when the last data pointed by one inlink descriptor has been received for Rx channel 0. For UHCI0, the raw interrupt bit turns to high level when the last data pointed by one inlink descriptor has been received and no data error is detected for Rx channel 0.
pub fn in_err_eof(&self) -> BitReaderRaw<bool>
pub fn in_err_eof(&self) -> BitReaderRaw<bool>
Bit 2 - The raw interrupt bit turns to high level when data error is detected only in the case that the peripheral is UHCI0 for Rx channel 0. For other peripherals, this raw interrupt is reserved.
pub fn in_dscr_err(&self) -> BitReaderRaw<bool>
pub fn in_dscr_err(&self) -> BitReaderRaw<bool>
Bit 3 - The raw interrupt bit turns to high level when detecting inlink descriptor error, including owner error, the second and third word error of inlink descriptor for Rx channel 0.
pub fn in_dscr_empty(&self) -> BitReaderRaw<bool>
pub fn in_dscr_empty(&self) -> BitReaderRaw<bool>
Bit 4 - The raw interrupt bit turns to high level when Rx buffer pointed by inlink is full and receiving data is not completed, but there is no more inlink for Rx channel 0.
pub fn infifo_full_wm(&self) -> BitReaderRaw<bool>
pub fn infifo_full_wm(&self) -> BitReaderRaw<bool>
Bit 5 - The raw interrupt bit turns to high level when received data byte number is up to threshold configured by REG_DMA_INFIFO_FULL_THRS_CH0 in Rx FIFO of channel 0.
pub fn infifo_ovf_l1(&self) -> BitReaderRaw<bool>
pub fn infifo_ovf_l1(&self) -> BitReaderRaw<bool>
Bit 6 - This raw interrupt bit turns to high level when level 1 fifo of Rx channel 0 is overflow.
pub fn infifo_udf_l1(&self) -> BitReaderRaw<bool>
pub fn infifo_udf_l1(&self) -> BitReaderRaw<bool>
Bit 7 - This raw interrupt bit turns to high level when level 1 fifo of Rx channel 0 is underflow.
pub fn infifo_ovf_l3(&self) -> BitReaderRaw<bool>
pub fn infifo_ovf_l3(&self) -> BitReaderRaw<bool>
Bit 8 - This raw interrupt bit turns to high level when level 3 fifo of Rx channel 0 is overflow.
pub fn infifo_udf_l3(&self) -> BitReaderRaw<bool>
pub fn infifo_udf_l3(&self) -> BitReaderRaw<bool>
Bit 9 - This raw interrupt bit turns to high level when level 3 fifo of Rx channel 0 is underflow.
Methods from Deref<Target = R<IN_INT_RAW_CH_SPEC>>§
pub fn bits(&self) -> <REG as RegisterSpec>::Ux
pub fn bits(&self) -> <REG as RegisterSpec>::Ux
Reads raw bits from register.