Struct esp32s3_hal::pac::apb_saradc::ctrl::W

pub struct W(_);

Register CTRL writer

Implementations

impl W

pub fn saradc_start_force(
    &mut self
) -> BitWriterRaw<'_, u32, CTRL_SPEC, bool, BitM, 0>

Bit 0 - enable start saradc by sw

pub fn saradc_start(
    &mut self
) -> BitWriterRaw<'_, u32, CTRL_SPEC, bool, BitM, 1>

Bit 1 - start saradc by sw

pub fn saradc_work_mode(
    &mut self
) -> FieldWriterRaw<'_, u32, CTRL_SPEC, u8, u8, Unsafe, 2, 3>

Bits 3:4 - 0: single mode, 1: double mode, 2: alternate mode

pub fn saradc_sar_sel(
    &mut self
) -> BitWriterRaw<'_, u32, CTRL_SPEC, bool, BitM, 5>

Bit 5 - 0: SAR1, 1: SAR2, only work for single SAR mode

pub fn saradc_sar_clk_gated(
    &mut self
) -> BitWriterRaw<'_, u32, CTRL_SPEC, bool, BitM, 6>

Bit 6 - enable SAR CLK gate when saradc idle

pub fn saradc_sar_clk_div(
    &mut self
) -> FieldWriterRaw<'_, u32, CTRL_SPEC, u8, u8, Unsafe, 8, 7>

Bits 7:14 - SAR clock divider

pub fn saradc_sar1_patt_len(
    &mut self
) -> FieldWriterRaw<'_, u32, CTRL_SPEC, u8, u8, Unsafe, 4, 15>

Bits 15:18 - 0 ~ 15 means length 1 ~ 16

pub fn saradc_sar2_patt_len(
    &mut self
) -> FieldWriterRaw<'_, u32, CTRL_SPEC, u8, u8, Unsafe, 4, 19>

Bits 19:22 - 0 ~ 15 means length 1 ~ 16

pub fn saradc_sar1_patt_p_clear(
    &mut self
) -> BitWriterRaw<'_, u32, CTRL_SPEC, bool, BitM, 23>

Bit 23 - clear the pointer of pattern table for DIG ADC1 CTRL

pub fn saradc_sar2_patt_p_clear(
    &mut self
) -> BitWriterRaw<'_, u32, CTRL_SPEC, bool, BitM, 24>

Bit 24 - clear the pointer of pattern table for DIG ADC2 CTRL

pub fn saradc_data_sar_sel(
    &mut self
) -> BitWriterRaw<'_, u32, CTRL_SPEC, bool, BitM, 25>

Bit 25 - 1: sar_sel will be coded by the MSB of the 16-bit output data, in this case the resolution should not be larger than 11 bits.

pub fn saradc_data_to_i2s(
    &mut self
) -> BitWriterRaw<'_, u32, CTRL_SPEC, bool, BitM, 26>

Bit 26 - 1: I2S input data is from SAR ADC (for DMA), 0: I2S input data is from GPIO matrix

pub fn saradc_xpd_sar_force(
    &mut self
) -> FieldWriterRaw<'_, u32, CTRL_SPEC, u8, u8, Unsafe, 2, 27>

Bits 27:28 - force option to xpd sar blocks

pub fn saradc_wait_arb_cycle(
    &mut self
) -> FieldWriterRaw<'_, u32, CTRL_SPEC, u8, u8, Unsafe, 2, 30>

Bits 30:31 - wait arbit signal stable after sar_done

pub unsafe fn bits(&mut self, bits: u32) -> &mut W

Writes raw bits to the register.

Methods from Deref<Target = W<CTRL_SPEC>>

pub unsafe fn bits(&mut self, bits: <REG as RegisterSpec>::Ux) -> &mut W<REG>

Writes raw bits to the register.

Safety

Read datasheet or reference manual to find what values are allowed to pass.

Trait Implementations

impl Deref for W

type Target = W<CTRL_SPEC>

The resulting type after dereferencing.

fn deref(&self) -> &<W as Deref>::Target

Dereferences the value.

impl DerefMut for W

fn deref_mut(&mut self) -> &mut <W as Deref>::Target

Mutably dereferences the value.

impl From<W<CTRL_SPEC>> for W

fn from(writer: W<CTRL_SPEC>) -> W

Converts to this type from the input type.