Struct esp32s3_hal::pac::usb_wrap::otg_conf::R
pub struct R(_);
Expand description
Register OTG_CONF
reader
Implementations
impl R
impl R
pub fn srp_sessend_override(&self) -> BitReaderRaw<bool>
pub fn srp_sessend_override(&self) -> BitReaderRaw<bool>
Bit 0 - This bit is used to enable the software over-ride of srp session end signal. 1’b0: the signal is controlled by the chip input. 1’b1: the signal is controlled by the software.
pub fn srp_sessend_value(&self) -> BitReaderRaw<bool>
pub fn srp_sessend_value(&self) -> BitReaderRaw<bool>
Bit 1 - Software over-ride value of srp session end signal.
pub fn phy_sel(&self) -> BitReaderRaw<bool>
pub fn phy_sel(&self) -> BitReaderRaw<bool>
Bit 2 - Select internal external PHY. 1’b0: Select internal PHY. 1’b1: Select external PHY.
pub fn dfifo_force_pd(&self) -> BitReaderRaw<bool>
pub fn dfifo_force_pd(&self) -> BitReaderRaw<bool>
Bit 3 - Force the dfifo to go into low power mode. The data in dfifo will not lost.
pub fn dbnce_fltr_bypass(&self) -> BitReaderRaw<bool>
pub fn dbnce_fltr_bypass(&self) -> BitReaderRaw<bool>
Bit 4 - Bypass Debounce filters for avalid,bvalid,vbusvalid,session end, id signals
pub fn exchg_pins_override(&self) -> BitReaderRaw<bool>
pub fn exchg_pins_override(&self) -> BitReaderRaw<bool>
Bit 5 - Enable software controlle USB D+ D- exchange
pub fn exchg_pins(&self) -> BitReaderRaw<bool>
pub fn exchg_pins(&self) -> BitReaderRaw<bool>
Bit 6 - USB D+ D- exchange. 1’b0: don’t change. 1’b1: exchange D+ D-
pub fn vrefh(&self) -> FieldReaderRaw<u8, u8>
pub fn vrefh(&self) -> FieldReaderRaw<u8, u8>
Bits 7:8 - Control single-end input high threshold,1.76V to 2V, step 80mV
pub fn vrefl(&self) -> FieldReaderRaw<u8, u8>
pub fn vrefl(&self) -> FieldReaderRaw<u8, u8>
Bits 9:10 - Control single-end input low threshold,0.8V to 1.04V, step 80mV
pub fn vref_override(&self) -> BitReaderRaw<bool>
pub fn vref_override(&self) -> BitReaderRaw<bool>
Bit 11 - Enable software controlle input threshold
pub fn pad_pull_override(&self) -> BitReaderRaw<bool>
pub fn pad_pull_override(&self) -> BitReaderRaw<bool>
Bit 12 - Enable software controlle USB D+ D- pullup pulldown
pub fn dp_pulldown(&self) -> BitReaderRaw<bool>
pub fn dp_pulldown(&self) -> BitReaderRaw<bool>
Bit 14 - Controlle USB D+ pulldown
pub fn dm_pulldown(&self) -> BitReaderRaw<bool>
pub fn dm_pulldown(&self) -> BitReaderRaw<bool>
Bit 16 - Controlle USB D+ pulldown
pub fn pullup_value(&self) -> BitReaderRaw<bool>
pub fn pullup_value(&self) -> BitReaderRaw<bool>
Bit 17 - Controlle pullup value. 1’b0: typical value is 2.4K. 1’b1: typical value is 1.2K.
pub fn usb_pad_enable(&self) -> BitReaderRaw<bool>
pub fn usb_pad_enable(&self) -> BitReaderRaw<bool>
Bit 18 - Enable USB pad function
pub fn ahb_clk_force_on(&self) -> BitReaderRaw<bool>
pub fn ahb_clk_force_on(&self) -> BitReaderRaw<bool>
Bit 19 - Force ahb clock always on
pub fn phy_clk_force_on(&self) -> BitReaderRaw<bool>
pub fn phy_clk_force_on(&self) -> BitReaderRaw<bool>
Bit 20 - Force phy clock always on
pub fn phy_tx_edge_sel(&self) -> BitReaderRaw<bool>
pub fn phy_tx_edge_sel(&self) -> BitReaderRaw<bool>
Bit 21 - Select phy tx signal output clock edge. 1’b0: negedge. 1’b1: posedge.
pub fn dfifo_force_pu(&self) -> BitReaderRaw<bool>
pub fn dfifo_force_pu(&self) -> BitReaderRaw<bool>
Bit 22 - Disable the dfifo to go into low power mode. The data in dfifo will not lost.
Methods from Deref<Target = R<OTG_CONF_SPEC>>
pub fn bits(&self) -> <REG as RegisterSpec>::Ux
pub fn bits(&self) -> <REG as RegisterSpec>::Ux
Reads raw bits from register.