pub struct R(_);
Expand description

Register OTG_CONF reader

Implementations

Bit 0 - This bit is used to enable the software over-ride of srp session end signal. 1’b0: the signal is controlled by the chip input. 1’b1: the signal is controlled by the software.

Bit 1 - Software over-ride value of srp session end signal.

Bit 2 - Select internal external PHY. 1’b0: Select internal PHY. 1’b1: Select external PHY.

Bit 3 - Force the dfifo to go into low power mode. The data in dfifo will not lost.

Bit 4 - Bypass Debounce filters for avalid,bvalid,vbusvalid,session end, id signals

Bit 5 - Enable software controlle USB D+ D- exchange

Bit 6 - USB D+ D- exchange. 1’b0: don’t change. 1’b1: exchange D+ D-

Bits 7:8 - Control single-end input high threshold,1.76V to 2V, step 80mV

Bits 9:10 - Control single-end input low threshold,0.8V to 1.04V, step 80mV

Bit 11 - Enable software controlle input threshold

Bit 12 - Enable software controlle USB D+ D- pullup pulldown

Bit 13 - Controlle USB D+ pullup

Bit 14 - Controlle USB D+ pulldown

Bit 15 - Controlle USB D+ pullup

Bit 16 - Controlle USB D+ pulldown

Bit 17 - Controlle pullup value. 1’b0: typical value is 2.4K. 1’b1: typical value is 1.2K.

Bit 18 - Enable USB pad function

Bit 19 - Force ahb clock always on

Bit 20 - Force phy clock always on

Bit 21 - Select phy tx signal output clock edge. 1’b0: negedge. 1’b1: posedge.

Bit 22 - Disable the dfifo to go into low power mode. The data in dfifo will not lost.

Bit 31 - Disable auto clock gating of CSR registers

Methods from Deref<Target = R<OTG_CONF_SPEC>>

Reads raw bits from register.

Trait Implementations

The resulting type after dereferencing.
Dereferences the value.
Converts to this type from the input type.

Auto Trait Implementations

Blanket Implementations

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Performs the conversion.