Struct esp32s3_hal::pac::rmt::int_raw::R
pub struct R(_);
Expand description
Register INT_RAW
reader
Implementations
impl R
impl R
pub unsafe fn ch_tx_end_int_raw(&self, n: u8) -> BitReaderRaw<bool>
pub unsafe fn ch_tx_end_int_raw(&self, n: u8) -> BitReaderRaw<bool>
The interrupt raw bit for CHANNEL[0-3]. Triggered when transmission done.
pub fn ch0_tx_end_int_raw(&self) -> BitReaderRaw<bool>
pub fn ch0_tx_end_int_raw(&self) -> BitReaderRaw<bool>
Bit 0 - The interrupt raw bit for CHANNEL0. Triggered when transmission done.
pub fn ch1_tx_end_int_raw(&self) -> BitReaderRaw<bool>
pub fn ch1_tx_end_int_raw(&self) -> BitReaderRaw<bool>
Bit 1 - The interrupt raw bit for CHANNEL1. Triggered when transmission done.
pub fn ch2_tx_end_int_raw(&self) -> BitReaderRaw<bool>
pub fn ch2_tx_end_int_raw(&self) -> BitReaderRaw<bool>
Bit 2 - The interrupt raw bit for CHANNEL2. Triggered when transmission done.
pub fn ch3_tx_end_int_raw(&self) -> BitReaderRaw<bool>
pub fn ch3_tx_end_int_raw(&self) -> BitReaderRaw<bool>
Bit 3 - The interrupt raw bit for CHANNEL3. Triggered when transmission done.
pub unsafe fn ch_tx_err_int_raw(&self, n: u8) -> BitReaderRaw<bool>
pub unsafe fn ch_tx_err_int_raw(&self, n: u8) -> BitReaderRaw<bool>
The interrupt raw bit for CHANNEL[0-3]. Triggered when error occurs.
pub fn ch0_tx_err_int_raw(&self) -> BitReaderRaw<bool>
pub fn ch0_tx_err_int_raw(&self) -> BitReaderRaw<bool>
Bit 4 - The interrupt raw bit for CHANNEL0. Triggered when error occurs.
pub fn ch1_tx_err_int_raw(&self) -> BitReaderRaw<bool>
pub fn ch1_tx_err_int_raw(&self) -> BitReaderRaw<bool>
Bit 5 - The interrupt raw bit for CHANNEL1. Triggered when error occurs.
pub fn ch2_tx_err_int_raw(&self) -> BitReaderRaw<bool>
pub fn ch2_tx_err_int_raw(&self) -> BitReaderRaw<bool>
Bit 6 - The interrupt raw bit for CHANNEL2. Triggered when error occurs.
pub fn ch3_tx_err_int_raw(&self) -> BitReaderRaw<bool>
pub fn ch3_tx_err_int_raw(&self) -> BitReaderRaw<bool>
Bit 7 - The interrupt raw bit for CHANNEL3. Triggered when error occurs.
pub unsafe fn ch_tx_thr_event_int_raw(&self, n: u8) -> BitReaderRaw<bool>
pub unsafe fn ch_tx_thr_event_int_raw(&self, n: u8) -> BitReaderRaw<bool>
The interrupt raw bit for CHANNEL[0-3]. Triggered when transmitter sent more data than configured value.
pub fn ch0_tx_thr_event_int_raw(&self) -> BitReaderRaw<bool>
pub fn ch0_tx_thr_event_int_raw(&self) -> BitReaderRaw<bool>
Bit 8 - The interrupt raw bit for CHANNEL0. Triggered when transmitter sent more data than configured value.
pub fn ch1_tx_thr_event_int_raw(&self) -> BitReaderRaw<bool>
pub fn ch1_tx_thr_event_int_raw(&self) -> BitReaderRaw<bool>
Bit 9 - The interrupt raw bit for CHANNEL1. Triggered when transmitter sent more data than configured value.
pub fn ch2_tx_thr_event_int_raw(&self) -> BitReaderRaw<bool>
pub fn ch2_tx_thr_event_int_raw(&self) -> BitReaderRaw<bool>
Bit 10 - The interrupt raw bit for CHANNEL2. Triggered when transmitter sent more data than configured value.
pub fn ch3_tx_thr_event_int_raw(&self) -> BitReaderRaw<bool>
pub fn ch3_tx_thr_event_int_raw(&self) -> BitReaderRaw<bool>
Bit 11 - The interrupt raw bit for CHANNEL3. Triggered when transmitter sent more data than configured value.
pub unsafe fn ch_tx_loop_int_raw(&self, n: u8) -> BitReaderRaw<bool>
pub unsafe fn ch_tx_loop_int_raw(&self, n: u8) -> BitReaderRaw<bool>
The interrupt raw bit for CHANNEL[0-3]. Triggered when the loop count reaches the configured threshold value.
pub fn ch0_tx_loop_int_raw(&self) -> BitReaderRaw<bool>
pub fn ch0_tx_loop_int_raw(&self) -> BitReaderRaw<bool>
Bit 12 - The interrupt raw bit for CHANNEL0. Triggered when the loop count reaches the configured threshold value.
pub fn ch1_tx_loop_int_raw(&self) -> BitReaderRaw<bool>
pub fn ch1_tx_loop_int_raw(&self) -> BitReaderRaw<bool>
Bit 13 - The interrupt raw bit for CHANNEL1. Triggered when the loop count reaches the configured threshold value.
pub fn ch2_tx_loop_int_raw(&self) -> BitReaderRaw<bool>
pub fn ch2_tx_loop_int_raw(&self) -> BitReaderRaw<bool>
Bit 14 - The interrupt raw bit for CHANNEL2. Triggered when the loop count reaches the configured threshold value.
pub fn ch3_tx_loop_int_raw(&self) -> BitReaderRaw<bool>
pub fn ch3_tx_loop_int_raw(&self) -> BitReaderRaw<bool>
Bit 15 - The interrupt raw bit for CHANNEL3. Triggered when the loop count reaches the configured threshold value.
pub unsafe fn ch_rx_end_int_raw(&self, n: u8) -> BitReaderRaw<bool>
pub unsafe fn ch_rx_end_int_raw(&self, n: u8) -> BitReaderRaw<bool>
The interrupt raw bit for CHANNEL4. Triggered when reception done.
pub fn ch4_rx_end_int_raw(&self) -> BitReaderRaw<bool>
pub fn ch4_rx_end_int_raw(&self) -> BitReaderRaw<bool>
Bit 16 - The interrupt raw bit for CHANNEL4. Triggered when reception done.
pub fn ch5_rx_end_int_raw(&self) -> BitReaderRaw<bool>
pub fn ch5_rx_end_int_raw(&self) -> BitReaderRaw<bool>
Bit 17 - The interrupt raw bit for CHANNEL4. Triggered when reception done.
pub fn ch6_rx_end_int_raw(&self) -> BitReaderRaw<bool>
pub fn ch6_rx_end_int_raw(&self) -> BitReaderRaw<bool>
Bit 18 - The interrupt raw bit for CHANNEL4. Triggered when reception done.
pub fn ch7_rx_end_int_raw(&self) -> BitReaderRaw<bool>
pub fn ch7_rx_end_int_raw(&self) -> BitReaderRaw<bool>
Bit 19 - The interrupt raw bit for CHANNEL4. Triggered when reception done.
pub unsafe fn ch_rx_err_int_raw(&self, n: u8) -> BitReaderRaw<bool>
pub unsafe fn ch_rx_err_int_raw(&self, n: u8) -> BitReaderRaw<bool>
The interrupt raw bit for CHANNEL4. Triggered when error occurs.
pub fn ch4_rx_err_int_raw(&self) -> BitReaderRaw<bool>
pub fn ch4_rx_err_int_raw(&self) -> BitReaderRaw<bool>
Bit 20 - The interrupt raw bit for CHANNEL4. Triggered when error occurs.
pub fn ch5_rx_err_int_raw(&self) -> BitReaderRaw<bool>
pub fn ch5_rx_err_int_raw(&self) -> BitReaderRaw<bool>
Bit 21 - The interrupt raw bit for CHANNEL4. Triggered when error occurs.
pub fn ch6_rx_err_int_raw(&self) -> BitReaderRaw<bool>
pub fn ch6_rx_err_int_raw(&self) -> BitReaderRaw<bool>
Bit 22 - The interrupt raw bit for CHANNEL4. Triggered when error occurs.
pub fn ch7_rx_err_int_raw(&self) -> BitReaderRaw<bool>
pub fn ch7_rx_err_int_raw(&self) -> BitReaderRaw<bool>
Bit 23 - The interrupt raw bit for CHANNEL4. Triggered when error occurs.
pub fn ch4_rx_thr_event_int_raw(&self) -> BitReaderRaw<bool>
pub fn ch4_rx_thr_event_int_raw(&self) -> BitReaderRaw<bool>
Bit 24 - The interrupt raw bit for CHANNEL4. Triggered when receiver receive more data than configured value.
pub fn ch5_rx_thr_event_int_raw(&self) -> BitReaderRaw<bool>
pub fn ch5_rx_thr_event_int_raw(&self) -> BitReaderRaw<bool>
Bit 25 - The interrupt raw bit for CHANNEL5. Triggered when receiver receive more data than configured value.
pub fn ch6_rx_thr_event_int_raw(&self) -> BitReaderRaw<bool>
pub fn ch6_rx_thr_event_int_raw(&self) -> BitReaderRaw<bool>
Bit 26 - The interrupt raw bit for CHANNEL6. Triggered when receiver receive more data than configured value.
pub fn ch7_rx_thr_event_int_raw(&self) -> BitReaderRaw<bool>
pub fn ch7_rx_thr_event_int_raw(&self) -> BitReaderRaw<bool>
Bit 27 - The interrupt raw bit for CHANNEL7. Triggered when receiver receive more data than configured value.
pub fn tx_ch3_dma_access_fail_int_raw(&self) -> BitReaderRaw<bool>
pub fn tx_ch3_dma_access_fail_int_raw(&self) -> BitReaderRaw<bool>
Bit 28 - The interrupt raw bit for CHANNEL3. Triggered when dma accessing CHANNEL3 fails.
pub fn rx_ch7_dma_access_fail_int_raw(&self) -> BitReaderRaw<bool>
pub fn rx_ch7_dma_access_fail_int_raw(&self) -> BitReaderRaw<bool>
Bit 29 - The interrupt raw bit for CHANNEL7. Triggered when dma accessing CHANNEL7 fails.
Methods from Deref<Target = R<INT_RAW_SPEC>>
pub fn bits(&self) -> <REG as RegisterSpec>::Ux
pub fn bits(&self) -> <REG as RegisterSpec>::Ux
Reads raw bits from register.