Struct esp32s3_hal::peripherals::EXTMEM

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pub struct EXTMEM { /* private fields */ }

Implementations§

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impl EXTMEM

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pub unsafe fn steal() -> EXTMEM

Unsafely create an instance of this peripheral out of thin air.

Safety

You must ensure that you’re only using one instance of this type at a time.

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pub const PTR: *const <EXTMEM as Deref>::Target = {0x600c4000 as *const <esp32s3::EXTMEM as core::ops::Deref>::Target}

Pointer to the register block

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pub const fn ptr() -> *const <EXTMEM as Deref>::Target

Return the pointer to the register block

Methods from Deref<Target = RegisterBlock>§

pub fn dcache_ctrl(&self) -> &Reg<DCACHE_CTRL_SPEC>

0x00 - ******* Description ***********

pub fn dcache_ctrl1(&self) -> &Reg<DCACHE_CTRL1_SPEC>

0x04 - ******* Description ***********

pub fn dcache_tag_power_ctrl(&self) -> &Reg<DCACHE_TAG_POWER_CTRL_SPEC>

0x08 - ******* Description ***********

pub fn dcache_prelock_ctrl(&self) -> &Reg<DCACHE_PRELOCK_CTRL_SPEC>

0x0c - ******* Description ***********

pub fn dcache_prelock_sct0_addr(&self) -> &Reg<DCACHE_PRELOCK_SCT0_ADDR_SPEC>

0x10 - ******* Description ***********

pub fn dcache_prelock_sct1_addr(&self) -> &Reg<DCACHE_PRELOCK_SCT1_ADDR_SPEC>

0x14 - ******* Description ***********

pub fn dcache_prelock_sct_size(&self) -> &Reg<DCACHE_PRELOCK_SCT_SIZE_SPEC>

0x18 - ******* Description ***********

pub fn dcache_lock_ctrl(&self) -> &Reg<DCACHE_LOCK_CTRL_SPEC>

0x1c - ******* Description ***********

pub fn dcache_lock_addr(&self) -> &Reg<DCACHE_LOCK_ADDR_SPEC>

0x20 - ******* Description ***********

pub fn dcache_lock_size(&self) -> &Reg<DCACHE_LOCK_SIZE_SPEC>

0x24 - ******* Description ***********

pub fn dcache_sync_ctrl(&self) -> &Reg<DCACHE_SYNC_CTRL_SPEC>

0x28 - ******* Description ***********

pub fn dcache_sync_addr(&self) -> &Reg<DCACHE_SYNC_ADDR_SPEC>

0x2c - ******* Description ***********

pub fn dcache_sync_size(&self) -> &Reg<DCACHE_SYNC_SIZE_SPEC>

0x30 - ******* Description ***********

pub fn dcache_occupy_ctrl(&self) -> &Reg<DCACHE_OCCUPY_CTRL_SPEC>

0x34 - ******* Description ***********

pub fn dcache_occupy_addr(&self) -> &Reg<DCACHE_OCCUPY_ADDR_SPEC>

0x38 - ******* Description ***********

pub fn dcache_occupy_size(&self) -> &Reg<DCACHE_OCCUPY_SIZE_SPEC>

0x3c - ******* Description ***********

pub fn dcache_preload_ctrl(&self) -> &Reg<DCACHE_PRELOAD_CTRL_SPEC>

0x40 - ******* Description ***********

pub fn dcache_preload_addr(&self) -> &Reg<DCACHE_PRELOAD_ADDR_SPEC>

0x44 - ******* Description ***********

pub fn dcache_preload_size(&self) -> &Reg<DCACHE_PRELOAD_SIZE_SPEC>

0x48 - ******* Description ***********

pub fn dcache_autoload_ctrl(&self) -> &Reg<DCACHE_AUTOLOAD_CTRL_SPEC>

0x4c - ******* Description ***********

pub fn dcache_autoload_sct0_addr(&self) -> &Reg<DCACHE_AUTOLOAD_SCT0_ADDR_SPEC>

0x50 - ******* Description ***********

pub fn dcache_autoload_sct0_size(&self) -> &Reg<DCACHE_AUTOLOAD_SCT0_SIZE_SPEC>

0x54 - ******* Description ***********

pub fn dcache_autoload_sct1_addr(&self) -> &Reg<DCACHE_AUTOLOAD_SCT1_ADDR_SPEC>

0x58 - ******* Description ***********

pub fn dcache_autoload_sct1_size(&self) -> &Reg<DCACHE_AUTOLOAD_SCT1_SIZE_SPEC>

0x5c - ******* Description ***********

pub fn icache_ctrl(&self) -> &Reg<ICACHE_CTRL_SPEC>

0x60 - ******* Description ***********

pub fn icache_ctrl1(&self) -> &Reg<ICACHE_CTRL1_SPEC>

0x64 - ******* Description ***********

pub fn icache_tag_power_ctrl(&self) -> &Reg<ICACHE_TAG_POWER_CTRL_SPEC>

0x68 - ******* Description ***********

pub fn icache_prelock_ctrl(&self) -> &Reg<ICACHE_PRELOCK_CTRL_SPEC>

0x6c - ******* Description ***********

pub fn icache_prelock_sct0_addr(&self) -> &Reg<ICACHE_PRELOCK_SCT0_ADDR_SPEC>

0x70 - ******* Description ***********

pub fn icache_prelock_sct1_addr(&self) -> &Reg<ICACHE_PRELOCK_SCT1_ADDR_SPEC>

0x74 - ******* Description ***********

pub fn icache_prelock_sct_size(&self) -> &Reg<ICACHE_PRELOCK_SCT_SIZE_SPEC>

0x78 - ******* Description ***********

pub fn icache_lock_ctrl(&self) -> &Reg<ICACHE_LOCK_CTRL_SPEC>

0x7c - ******* Description ***********

pub fn icache_lock_addr(&self) -> &Reg<ICACHE_LOCK_ADDR_SPEC>

0x80 - ******* Description ***********

pub fn icache_lock_size(&self) -> &Reg<ICACHE_LOCK_SIZE_SPEC>

0x84 - ******* Description ***********

pub fn icache_sync_ctrl(&self) -> &Reg<ICACHE_SYNC_CTRL_SPEC>

0x88 - ******* Description ***********

pub fn icache_sync_addr(&self) -> &Reg<ICACHE_SYNC_ADDR_SPEC>

0x8c - ******* Description ***********

pub fn icache_sync_size(&self) -> &Reg<ICACHE_SYNC_SIZE_SPEC>

0x90 - ******* Description ***********

pub fn icache_preload_ctrl(&self) -> &Reg<ICACHE_PRELOAD_CTRL_SPEC>

0x94 - ******* Description ***********

pub fn icache_preload_addr(&self) -> &Reg<ICACHE_PRELOAD_ADDR_SPEC>

0x98 - ******* Description ***********

pub fn icache_preload_size(&self) -> &Reg<ICACHE_PRELOAD_SIZE_SPEC>

0x9c - ******* Description ***********

pub fn icache_autoload_ctrl(&self) -> &Reg<ICACHE_AUTOLOAD_CTRL_SPEC>

0xa0 - ******* Description ***********

pub fn icache_autoload_sct0_addr(&self) -> &Reg<ICACHE_AUTOLOAD_SCT0_ADDR_SPEC>

0xa4 - ******* Description ***********

pub fn icache_autoload_sct0_size(&self) -> &Reg<ICACHE_AUTOLOAD_SCT0_SIZE_SPEC>

0xa8 - ******* Description ***********

pub fn icache_autoload_sct1_addr(&self) -> &Reg<ICACHE_AUTOLOAD_SCT1_ADDR_SPEC>

0xac - ******* Description ***********

pub fn icache_autoload_sct1_size(&self) -> &Reg<ICACHE_AUTOLOAD_SCT1_SIZE_SPEC>

0xb0 - ******* Description ***********

pub fn ibus_to_flash_start_vaddr(&self) -> &Reg<IBUS_TO_FLASH_START_VADDR_SPEC>

0xb4 - ******* Description ***********

pub fn ibus_to_flash_end_vaddr(&self) -> &Reg<IBUS_TO_FLASH_END_VADDR_SPEC>

0xb8 - ******* Description ***********

pub fn dbus_to_flash_start_vaddr(&self) -> &Reg<DBUS_TO_FLASH_START_VADDR_SPEC>

0xbc - ******* Description ***********

pub fn dbus_to_flash_end_vaddr(&self) -> &Reg<DBUS_TO_FLASH_END_VADDR_SPEC>

0xc0 - ******* Description ***********

pub fn cache_acs_cnt_clr(&self) -> &Reg<CACHE_ACS_CNT_CLR_SPEC>

0xc4 - ******* Description ***********

pub fn ibus_acs_miss_cnt(&self) -> &Reg<IBUS_ACS_MISS_CNT_SPEC>

0xc8 - ******* Description ***********

pub fn ibus_acs_cnt(&self) -> &Reg<IBUS_ACS_CNT_SPEC>

0xcc - ******* Description ***********

pub fn dbus_acs_flash_miss_cnt(&self) -> &Reg<DBUS_ACS_FLASH_MISS_CNT_SPEC>

0xd0 - ******* Description ***********

pub fn dbus_acs_spiram_miss_cnt(&self) -> &Reg<DBUS_ACS_SPIRAM_MISS_CNT_SPEC>

0xd4 - ******* Description ***********

pub fn dbus_acs_cnt(&self) -> &Reg<DBUS_ACS_CNT_SPEC>

0xd8 - ******* Description ***********

pub fn cache_ilg_int_ena(&self) -> &Reg<CACHE_ILG_INT_ENA_SPEC>

0xdc - ******* Description ***********

pub fn cache_ilg_int_clr(&self) -> &Reg<CACHE_ILG_INT_CLR_SPEC>

0xe0 - ******* Description ***********

pub fn cache_ilg_int_st(&self) -> &Reg<CACHE_ILG_INT_ST_SPEC>

0xe4 - ******* Description ***********

pub fn core0_acs_cache_int_ena(&self) -> &Reg<CORE0_ACS_CACHE_INT_ENA_SPEC>

0xe8 - ******* Description ***********

pub fn core0_acs_cache_int_clr(&self) -> &Reg<CORE0_ACS_CACHE_INT_CLR_SPEC>

0xec - ******* Description ***********

pub fn core0_acs_cache_int_st(&self) -> &Reg<CORE0_ACS_CACHE_INT_ST_SPEC>

0xf0 - ******* Description ***********

pub fn core1_acs_cache_int_ena(&self) -> &Reg<CORE1_ACS_CACHE_INT_ENA_SPEC>

0xf4 - ******* Description ***********

pub fn core1_acs_cache_int_clr(&self) -> &Reg<CORE1_ACS_CACHE_INT_CLR_SPEC>

0xf8 - ******* Description ***********

pub fn core1_acs_cache_int_st(&self) -> &Reg<CORE1_ACS_CACHE_INT_ST_SPEC>

0xfc - ******* Description ***********

pub fn core0_dbus_reject_st(&self) -> &Reg<CORE0_DBUS_REJECT_ST_SPEC>

0x100 - ******* Description ***********

pub fn core0_dbus_reject_vaddr(&self) -> &Reg<CORE0_DBUS_REJECT_VADDR_SPEC>

0x104 - ******* Description ***********

pub fn core0_ibus_reject_st(&self) -> &Reg<CORE0_IBUS_REJECT_ST_SPEC>

0x108 - ******* Description ***********

pub fn core0_ibus_reject_vaddr(&self) -> &Reg<CORE0_IBUS_REJECT_VADDR_SPEC>

0x10c - ******* Description ***********

pub fn core1_dbus_reject_st(&self) -> &Reg<CORE1_DBUS_REJECT_ST_SPEC>

0x110 - ******* Description ***********

pub fn core1_dbus_reject_vaddr(&self) -> &Reg<CORE1_DBUS_REJECT_VADDR_SPEC>

0x114 - ******* Description ***********

pub fn core1_ibus_reject_st(&self) -> &Reg<CORE1_IBUS_REJECT_ST_SPEC>

0x118 - ******* Description ***********

pub fn core1_ibus_reject_vaddr(&self) -> &Reg<CORE1_IBUS_REJECT_VADDR_SPEC>

0x11c - ******* Description ***********

pub fn cache_mmu_fault_content(&self) -> &Reg<CACHE_MMU_FAULT_CONTENT_SPEC>

0x120 - ******* Description ***********

pub fn cache_mmu_fault_vaddr(&self) -> &Reg<CACHE_MMU_FAULT_VADDR_SPEC>

0x124 - ******* Description ***********

pub fn cache_wrap_around_ctrl(&self) -> &Reg<CACHE_WRAP_AROUND_CTRL_SPEC>

0x128 - ******* Description ***********

pub fn cache_mmu_power_ctrl(&self) -> &Reg<CACHE_MMU_POWER_CTRL_SPEC>

0x12c - ******* Description ***********

pub fn cache_state(&self) -> &Reg<CACHE_STATE_SPEC>

0x130 - ******* Description ***********

pub fn cache_encrypt_decrypt_record_disable( &self ) -> &Reg<CACHE_ENCRYPT_DECRYPT_RECORD_DISABLE_SPEC>

0x134 - ******* Description ***********

pub fn cache_encrypt_decrypt_clk_force_on( &self ) -> &Reg<CACHE_ENCRYPT_DECRYPT_CLK_FORCE_ON_SPEC>

0x138 - ******* Description ***********

pub fn cache_bridge_arbiter_ctrl(&self) -> &Reg<CACHE_BRIDGE_ARBITER_CTRL_SPEC>

0x13c - ******* Description ***********

pub fn cache_preload_int_ctrl(&self) -> &Reg<CACHE_PRELOAD_INT_CTRL_SPEC>

0x140 - ******* Description ***********

pub fn cache_sync_int_ctrl(&self) -> &Reg<CACHE_SYNC_INT_CTRL_SPEC>

0x144 - ******* Description ***********

pub fn cache_mmu_owner(&self) -> &Reg<CACHE_MMU_OWNER_SPEC>

0x148 - ******* Description ***********

pub fn cache_conf_misc(&self) -> &Reg<CACHE_CONF_MISC_SPEC>

0x14c - ******* Description ***********

pub fn dcache_freeze(&self) -> &Reg<DCACHE_FREEZE_SPEC>

0x150 - ******* Description ***********

pub fn icache_freeze(&self) -> &Reg<ICACHE_FREEZE_SPEC>

0x154 - ******* Description ***********

pub fn icache_atomic_operate_ena(&self) -> &Reg<ICACHE_ATOMIC_OPERATE_ENA_SPEC>

0x158 - ******* Description ***********

pub fn dcache_atomic_operate_ena(&self) -> &Reg<DCACHE_ATOMIC_OPERATE_ENA_SPEC>

0x15c - ******* Description ***********

pub fn cache_request(&self) -> &Reg<CACHE_REQUEST_SPEC>

0x160 - ******* Description ***********

pub fn clock_gate(&self) -> &Reg<CLOCK_GATE_SPEC>

0x164 - ******* Description ***********

pub fn cache_tag_object_ctrl(&self) -> &Reg<CACHE_TAG_OBJECT_CTRL_SPEC>

0x180 - ******* Description ***********

pub fn cache_tag_way_object(&self) -> &Reg<CACHE_TAG_WAY_OBJECT_SPEC>

0x184 - ******* Description ***********

pub fn cache_vaddr(&self) -> &Reg<CACHE_VADDR_SPEC>

0x188 - ******* Description ***********

pub fn cache_tag_content(&self) -> &Reg<CACHE_TAG_CONTENT_SPEC>

0x18c - ******* Description ***********

pub fn date(&self) -> &Reg<DATE_SPEC>

0x3fc - ******* Description ***********

Trait Implementations§

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impl Debug for EXTMEM

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fn fmt(&self, f: &mut Formatter<'_>) -> Result<(), Error>

Formats the value using the given formatter. Read more
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impl Deref for EXTMEM

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type Target = <EXTMEM as Deref>::Target

The resulting type after dereferencing.
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fn deref(&self) -> &<EXTMEM as Deref>::Target

Dereferences the value.
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impl DerefMut for EXTMEM

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fn deref_mut(&mut self) -> &mut <EXTMEM as Deref>::Target

Mutably dereferences the value.
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impl Peripheral for EXTMEM

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type P = EXTMEM

Peripheral singleton type
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unsafe fn clone_unchecked(&mut self) -> <EXTMEM as Peripheral>::P

Unsafely clone (duplicate) a peripheral singleton. Read more
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fn into_ref<'a>(self) -> PeripheralRef<'a, Self::P>
where Self: 'a,

Convert a value into a PeripheralRef. Read more

Auto Trait Implementations§

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impl<T> Any for T
where T: 'static + ?Sized,

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fn type_id(&self) -> TypeId

Gets the TypeId of self. Read more
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impl<T> Borrow<T> for T
where T: ?Sized,

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fn borrow(&self) -> &T

Immutably borrows from an owned value. Read more
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impl<T> BorrowMut<T> for T
where T: ?Sized,

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fn borrow_mut(&mut self) -> &mut T

Mutably borrows from an owned value. Read more
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impl<T> From<T> for T

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fn from(t: T) -> T

Returns the argument unchanged.

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impl<T, U> Into<U> for T
where U: From<T>,

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fn into(self) -> U

Calls U::from(self).

That is, this conversion is whatever the implementation of From<T> for U chooses to do.

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impl<T, U> TryFrom<U> for T
where U: Into<T>,

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type Error = Infallible

The type returned in the event of a conversion error.
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fn try_from(value: U) -> Result<T, <T as TryFrom<U>>::Error>

Performs the conversion.
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impl<T, U> TryInto<U> for T
where U: TryFrom<T>,

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type Error = <U as TryFrom<T>>::Error

The type returned in the event of a conversion error.
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fn try_into(self) -> Result<U, <U as TryFrom<T>>::Error>

Performs the conversion.