Struct esp32s3_hal::peripherals::SPI1

pub struct SPI1 { /* private fields */ }

Implementations

impl SPI1

pub unsafe fn steal() -> SPI1

Unsafely create an instance of this peripheral out of thin air.

Safety

You must ensure that you’re only using one instance of this type at a time.

pub const PTR: *const <SPI1 as Deref>::Target = {0x60002000 as *const <esp32s3::SPI1 as core::ops::Deref>::Target}

Pointer to the register block

pub const fn ptr() -> *const <SPI1 as Deref>::Target

Return the pointer to the register block

Methods from Deref<Target = RegisterBlock>

pub fn cmd(&self) -> &Reg<CMD_SPEC>

0x00 - SPI1 memory command register

pub fn addr(&self) -> &Reg<ADDR_SPEC>

0x04 - SPI1 address register

pub fn ctrl(&self) -> &Reg<CTRL_SPEC>

0x08 - SPI1 control register

pub fn ctrl1(&self) -> &Reg<CTRL1_SPEC>

0x0c - SPI1 control1 register

pub fn ctrl2(&self) -> &Reg<CTRL2_SPEC>

0x10 - SPI1 control2 register

pub fn clock(&self) -> &Reg<CLOCK_SPEC>

0x14 - SPI_CLK clock division register when SPI1 accesses to flash or Ext_RAM.

pub fn user(&self) -> &Reg<USER_SPEC>

0x18 - SPI1 user register.

pub fn user1(&self) -> &Reg<USER1_SPEC>

0x1c - SPI1 user1 register.

pub fn user2(&self) -> &Reg<USER2_SPEC>

0x20 - SPI1 user2 register.

pub fn mosi_dlen(&self) -> &Reg<MOSI_DLEN_SPEC>

0x24 - SPI1 write-data bit length register.

pub fn miso_dlen(&self) -> &Reg<MISO_DLEN_SPEC>

0x28 - SPI1 read-data bit length register.

pub fn rd_status(&self) -> &Reg<RD_STATUS_SPEC>

0x2c - SPI1 read control register.

pub fn ext_addr(&self) -> &Reg<EXT_ADDR_SPEC>

0x30 - SPI1 extended address register.

pub fn misc(&self) -> &Reg<MISC_SPEC>

0x34 - SPI1 misc register.

pub fn tx_crc(&self) -> &Reg<TX_CRC_SPEC>

0x38 - SPI1 CRC data register.

pub fn cache_fctrl(&self) -> &Reg<CACHE_FCTRL_SPEC>

0x3c - SPI1 bit mode control register.

pub fn fsm(&self) -> &Reg<FSM_SPEC>

0x54 - SPI1 state machine(FSM) status register.

pub fn w0(&self) -> &Reg<W0_SPEC>

0x58 - SPI1 memory data buffer0

pub fn w1(&self) -> &Reg<W1_SPEC>

0x5c - SPI1 memory data buffer1

pub fn w2(&self) -> &Reg<W2_SPEC>

0x60 - SPI1 memory data buffer2

pub fn w3(&self) -> &Reg<W3_SPEC>

0x64 - SPI1 memory data buffer3

pub fn w4(&self) -> &Reg<W4_SPEC>

0x68 - SPI1 memory data buffer4

pub fn w5(&self) -> &Reg<W5_SPEC>

0x6c - SPI1 memory data buffer5

pub fn w6(&self) -> &Reg<W6_SPEC>

0x70 - SPI1 memory data buffer6

pub fn w7(&self) -> &Reg<W7_SPEC>

0x74 - SPI1 memory data buffer7

pub fn w8(&self) -> &Reg<W8_SPEC>

0x78 - SPI1 memory data buffer8

pub fn w9(&self) -> &Reg<W9_SPEC>

0x7c - SPI1 memory data buffer9

pub fn w10(&self) -> &Reg<W10_SPEC>

0x80 - SPI1 memory data buffer10

pub fn w11(&self) -> &Reg<W11_SPEC>

0x84 - SPI1 memory data buffer11

pub fn w12(&self) -> &Reg<W12_SPEC>

0x88 - SPI1 memory data buffer12

pub fn w13(&self) -> &Reg<W13_SPEC>

0x8c - SPI1 memory data buffer13

pub fn w14(&self) -> &Reg<W14_SPEC>

0x90 - SPI1 memory data buffer14

pub fn w15(&self) -> &Reg<W15_SPEC>

0x94 - SPI1 memory data buffer15

pub fn flash_waiti_ctrl(&self) -> &Reg<FLASH_WAITI_CTRL_SPEC>

0x98 - SPI1 wait idle control register

pub fn flash_sus_cmd(&self) -> &Reg<FLASH_SUS_CMD_SPEC>

0x9c - SPI1 flash suspend control register

pub fn flash_sus_ctrl(&self) -> &Reg<FLASH_SUS_CTRL_SPEC>

0xa0 - SPI1 flash suspend command register

pub fn sus_status(&self) -> &Reg<SUS_STATUS_SPEC>

0xa4 - SPI1 flash suspend status register

pub fn timing_cali(&self) -> &Reg<TIMING_CALI_SPEC>

0xa8 - SPI1 timing compensation register when accesses to flash or Ext_RAM.

pub fn ddr(&self) -> &Reg<DDR_SPEC>

0xe0 - SPI1 DDR control register

pub fn clock_gate(&self) -> &Reg<CLOCK_GATE_SPEC>

0xe8 - SPI1 clk_gate register

pub fn int_ena(&self) -> &Reg<INT_ENA_SPEC>

0xf0 - SPI1 interrupt enable register

pub fn int_clr(&self) -> &Reg<INT_CLR_SPEC>

0xf4 - SPI1 interrupt clear register

pub fn int_raw(&self) -> &Reg<INT_RAW_SPEC>

0xf8 - SPI1 interrupt raw register

pub fn int_st(&self) -> &Reg<INT_ST_SPEC>

0xfc - SPI1 interrupt status register

pub fn date(&self) -> &Reg<DATE_SPEC>

0x3fc - SPI0 version control register

Trait Implementations

impl Debug for SPI1

fn fmt(&self, f: &mut Formatter<'_>) -> Result<(), Error>

Formats the value using the given formatter.

impl Deref for SPI1

type Target = <SPI1 as Deref>::Target

The resulting type after dereferencing.

fn deref(&self) -> &<SPI1 as Deref>::Target

Dereferences the value.

impl DerefMut for SPI1

fn deref_mut(&mut self) -> &mut <SPI1 as Deref>::Target

Mutably dereferences the value.

impl Peripheral for SPI1

type P = SPI1

Peripheral singleton type

unsafe fn clone_unchecked(&mut self) -> <SPI1 as Peripheral>::P

Unsafely clone (duplicate) a peripheral singleton.

fn into_ref<'a>(self) -> PeripheralRef<'a, Self::P>

where Self: 'a,

Convert a value into a PeripheralRef.