Struct esp32s2::rtc_cntl::slow_clk_conf::R

pub struct R(_);

Register SLOW_CLK_CONF reader

Implementations

impl R

pub fn ana_clk_div_vld(&self) -> ANA_CLK_DIV_VLD_R

Bit 22 - Synchronizes the reg_rtc_ana_clk_div bus. Note that you have to invalidate the bus before switching clock, and validate the new clock.

pub fn ana_clk_div(&self) -> ANA_CLK_DIV_R

Bits 23:30 - Set the rtc_clk divider.

pub fn slow_clk_next_edge(&self) -> SLOW_CLK_NEXT_EDGE_R

Bit 31

Methods from Deref<Target = R<SLOW_CLK_CONF_SPEC>>

pub fn bits(&self) -> REG::Ux

Reads raw bits from register.

Trait Implementations

impl Deref for R

type Target = R<SLOW_CLK_CONF_SPEC>

The resulting type after dereferencing.

fn deref(&self) -> &Self::Target

Dereferences the value.

impl From<R<SLOW_CLK_CONF_SPEC>> for R

fn from(reader: R<SLOW_CLK_CONF_SPEC>) -> Self

Converts to this type from the input type.