pub struct W(_);Expand description
Register FIFO_CONF writer
Implementations§
source§impl W
impl W
sourcepub fn rx_data_num(&mut self) -> RX_DATA_NUM_W<'_, 0>
pub fn rx_data_num(&mut self) -> RX_DATA_NUM_W<'_, 0>
Bits 0:5 - I2S_RX_TAKE_DATA_INT is triggered when the left and right channel data number in RX FIFO is larger than the value of I2S_RX_DATA_NUM[5:0]. (RX FIFO is almost full threshold.)
sourcepub fn tx_data_num(&mut self) -> TX_DATA_NUM_W<'_, 6>
pub fn tx_data_num(&mut self) -> TX_DATA_NUM_W<'_, 6>
Bits 6:11 - I2S_TX_PUT_DATA_INT is triggered when the left and right channel data number in TX FIFO is smaller than the value of I2S_TX_DATA_NUM[5:0]. (TX FIFO is almost empty threshold.)
sourcepub fn tx_fifo_mod(&mut self) -> TX_FIFO_MOD_W<'_, 13>
pub fn tx_fifo_mod(&mut self) -> TX_FIFO_MOD_W<'_, 13>
Bits 13:15 - Transmitter FIFO mode configuration bits
sourcepub fn rx_fifo_mod(&mut self) -> RX_FIFO_MOD_W<'_, 16>
pub fn rx_fifo_mod(&mut self) -> RX_FIFO_MOD_W<'_, 16>
Bits 16:18 - Receiver FIFO mode configuration bits
sourcepub fn tx_fifo_mod_force_en(&mut self) -> TX_FIFO_MOD_FORCE_EN_W<'_, 19>
pub fn tx_fifo_mod_force_en(&mut self) -> TX_FIFO_MOD_FORCE_EN_W<'_, 19>
Bit 19 - The bit should always be set to 1
sourcepub fn rx_fifo_mod_force_en(&mut self) -> RX_FIFO_MOD_FORCE_EN_W<'_, 20>
pub fn rx_fifo_mod_force_en(&mut self) -> RX_FIFO_MOD_FORCE_EN_W<'_, 20>
Bit 20 - The bit should always be set to 1
sourcepub fn rx_fifo_sync(&mut self) -> RX_FIFO_SYNC_W<'_, 21>
pub fn rx_fifo_sync(&mut self) -> RX_FIFO_SYNC_W<'_, 21>
Bit 21 - force write back rx data to memory
sourcepub fn rx_24msb_en(&mut self) -> RX_24MSB_EN_W<'_, 22>
pub fn rx_24msb_en(&mut self) -> RX_24MSB_EN_W<'_, 22>
Bit 22 - Only useful in rx 24bit mode. 1: the high 24 bits are effective in i2s fifo 0: the low 24 bits are effective in i2s fifo
sourcepub fn tx_24msb_en(&mut self) -> TX_24MSB_EN_W<'_, 23>
pub fn tx_24msb_en(&mut self) -> TX_24MSB_EN_W<'_, 23>
Bit 23 - Only useful in tx 24bit mode. 1: the high 24 bits are effective in i2s fifo 0: the low 24 bits are effective in i2s fifo