Struct esp32s2::i2s::fifo_conf::W

source ·
pub struct W(_);
Expand description

Register FIFO_CONF writer

Implementations§

Bits 0:5 - I2S_RX_TAKE_DATA_INT is triggered when the left and right channel data number in RX FIFO is larger than the value of I2S_RX_DATA_NUM[5:0]. (RX FIFO is almost full threshold.)

Bits 6:11 - I2S_TX_PUT_DATA_INT is triggered when the left and right channel data number in TX FIFO is smaller than the value of I2S_TX_DATA_NUM[5:0]. (TX FIFO is almost empty threshold.)

Bit 12 - Set this bit to enable I2S DMA mode.

Bits 13:15 - Transmitter FIFO mode configuration bits

Bits 16:18 - Receiver FIFO mode configuration bits

Bit 19 - The bit should always be set to 1

Bit 20 - The bit should always be set to 1

Bit 21 - force write back rx data to memory

Bit 22 - Only useful in rx 24bit mode. 1: the high 24 bits are effective in i2s fifo 0: the low 24 bits are effective in i2s fifo

Bit 23 - Only useful in tx 24bit mode. 1: the high 24 bits are effective in i2s fifo 0: the low 24 bits are effective in i2s fifo

Writes raw bits to the register.

Methods from Deref<Target = W<FIFO_CONF_SPEC>>§

Writes raw bits to the register.

Safety

Read datasheet or reference manual to find what values are allowed to pass.

Trait Implementations§

The resulting type after dereferencing.
Dereferences the value.
Mutably dereferences the value.
Converts to this type from the input type.

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That is, this conversion is whatever the implementation of From<T> for U chooses to do.

The type returned in the event of a conversion error.
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The type returned in the event of a conversion error.
Performs the conversion.