Struct esp32s2::dedicated_gpio::intr_rcgn::R

pub struct R(_);

Register INTR_RCGN reader

Implementations

impl R

pub fn intr_mode_ch0(&self) -> INTR_MODE_CH0_R

Bits 0:2 - Configure channel 0 interrupt generate mode. 0/1: do not generate interrupt. 2: low level trigger. 3: high level trigger. 4: falling edge trigger. 5: raising edge trigger. 6/7: falling and raising edge trigger.

pub fn intr_mode_ch1(&self) -> INTR_MODE_CH1_R

Bits 3:5 - Configure channel 1 interrupt generate mode. 0/1: do not generate interrupt. 2: low level trigger. 3: high level trigger. 4: falling edge trigger. 5: raising edge trigger. 6/7: falling and raising edge trigger.

pub fn intr_mode_ch2(&self) -> INTR_MODE_CH2_R

Bits 6:8 - Configure channel 2 interrupt generate mode. 0/1: do not generate interrupt. 2: low level trigger. 3: high level trigger. 4: falling edge trigger. 5: raising edge trigger. 6/7: falling and raising edge trigger.

pub fn intr_mode_ch3(&self) -> INTR_MODE_CH3_R

Bits 9:11 - Configure channel 3 interrupt generate mode. 0/1: do not generate interrupt. 2: low level trigger. 3: high level trigger. 4: falling edge trigger. 5: raising edge trigger. 6/7: falling and raising edge trigger.

pub fn intr_mode_ch4(&self) -> INTR_MODE_CH4_R

Bits 12:14 - Configure channel 4 interrupt generate mode. 0/1: do not generate interrupt. 2: low level trigger. 3: high level trigger. 4: falling edge trigger. 5: raising edge trigger. 6/7: falling and raising edge trigger.

pub fn intr_mode_ch5(&self) -> INTR_MODE_CH5_R

Bits 15:17 - Configure channel 5 interrupt generate mode. 0/1: do not generate interrupt. 2: low level trigger. 3: high level trigger. 4: falling edge trigger. 5: raising edge trigger. 6/7: falling and raising edge trigger.

pub fn intr_mode_ch6(&self) -> INTR_MODE_CH6_R

Bits 18:20 - Configure channel 6 interrupt generate mode. 0/1: do not generate interrupt. 2: low level trigger. 3: high level trigger. 4: falling edge trigger. 5: raising edge trigger. 6/7: falling and raising edge trigger.

pub fn intr_mode_ch7(&self) -> INTR_MODE_CH7_R

Bits 21:23 - Configure channel 7 interrupt generate mode. 0/1: do not generate interrupt. 2: low level trigger. 3: high level trigger. 4: falling edge trigger. 5: raising edge trigger. 6/7: falling and raising edge trigger.

Methods from Deref<Target = R<INTR_RCGN_SPEC>>

pub fn bits(&self) -> REG::Ux

Reads raw bits from register.

Trait Implementations

impl Deref for R

type Target = R<INTR_RCGN_SPEC>

The resulting type after dereferencing.

fn deref(&self) -> &Self::Target

Dereferences the value.

impl From<R<INTR_RCGN_SPEC>> for R

fn from(reader: R<INTR_RCGN_SPEC>) -> Self

Converts to this type from the input type.