Struct esp32s2::spi0::dout_mode::R

pub struct R(_);

Register DOUT_MODE reader

Implementations

impl R

pub fn dout0_mode(&self) -> DOUT0_MODE_R

Bits 0:2 - the output signals are delayed by system clock cycles, 0: output without delayed, 1: output with the posedge of clk_apb,2 output with the negedge of clk_apb, 3: output with the spi_clk. Can be configured in CONF state.

pub fn dout1_mode(&self) -> DOUT1_MODE_R

Bits 3:5 - the output signals are delayed by system clock cycles, 0: output without delayed, 1: output with the posedge of clk_apb,2 output with the negedge of clk_apb, 3: output with the spi_clk. Can be configured in CONF state.

pub fn dout2_mode(&self) -> DOUT2_MODE_R

Bits 6:8 - the output signals are delayed by system clock cycles, 0: output without delayed, 1: output with the posedge of clk_apb,2 output with the negedge of clk_apb, 3: output with the spi_clk. Can be configured in CONF state.

pub fn dout3_mode(&self) -> DOUT3_MODE_R

Bits 9:11 - the output signals are delayed by system clock cycles, 0: output without delayed, 1: output with the posedge of clk_apb,2 output with the negedge of clk_apb, 3: output with the spi_clk. Can be configured in CONF state.

pub fn dout4_mode(&self) -> DOUT4_MODE_R

Bits 12:14 - the output signals are delayed by system clock cycles, 0: output without delayed, 1: output with the posedge of clk_apb,2 output with the negedge of clk_apb, 3: output with the spi_clk. Can be configured in CONF state.

pub fn dout5_mode(&self) -> DOUT5_MODE_R

Bits 15:17 - the output signals are delayed by system clock cycles, 0: output without delayed, 1: output with the posedge of clk_apb,2 output with the negedge of clk_apb, 3: output with the spi_clk. Can be configured in CONF state.

pub fn dout6_mode(&self) -> DOUT6_MODE_R

Bits 18:20 - the output signals are delayed by system clock cycles, 0: output without delayed, 1: output with the posedge of clk_apb,2 output with the negedge of clk_apb, 3: output with the spi_clk. Can be configured in CONF state.

pub fn dout7_mode(&self) -> DOUT7_MODE_R

Bits 21:23 - the output signals are delayed by system clock cycles, 0: output without delayed, 1: output with the posedge of clk_apb,2 output with the negedge of clk_apb, 3: output with the spi_clk. Can be configured in CONF state.

Methods from Deref<Target = R<DOUT_MODE_SPEC>>

pub fn bits(&self) -> REG::Ux

Reads raw bits from register.

Trait Implementations

impl Deref for R

type Target = R<DOUT_MODE_SPEC>

The resulting type after dereferencing.

fn deref(&self) -> &Self::Target

Dereferences the value.

impl From<R<DOUT_MODE_SPEC>> for R

fn from(reader: R<DOUT_MODE_SPEC>) -> Self

Converts to this type from the input type.