Struct esp32s2::sens::RegisterBlock

source ·
#[repr(C)]
pub struct RegisterBlock {
Show 68 fields pub sar_reader1_ctrl: SAR_READER1_CTRL, pub sar_reader1_status: SAR_READER1_STATUS, pub sar_meas1_ctrl1: SAR_MEAS1_CTRL1, pub sar_meas1_ctrl2: SAR_MEAS1_CTRL2, pub sar_meas1_mux: SAR_MEAS1_MUX, pub sar_atten1: SAR_ATTEN1, pub sar_amp_ctrl1: SAR_AMP_CTRL1, pub sar_amp_ctrl2: SAR_AMP_CTRL2, pub sar_amp_ctrl3: SAR_AMP_CTRL3, pub sar_reader2_ctrl: SAR_READER2_CTRL, pub sar_reader2_status: SAR_READER2_STATUS, pub sar_meas2_ctrl1: SAR_MEAS2_CTRL1, pub sar_meas2_ctrl2: SAR_MEAS2_CTRL2, pub sar_meas2_mux: SAR_MEAS2_MUX, pub sar_atten2: SAR_ATTEN2, pub sar_power_xpd_sar: SAR_POWER_XPD_SAR, pub sar_slave_addr1: SAR_SLAVE_ADDR1, pub sar_slave_addr2: SAR_SLAVE_ADDR2, pub sar_slave_addr3: SAR_SLAVE_ADDR3, pub sar_slave_addr4: SAR_SLAVE_ADDR4, pub sar_tsens_ctrl: SAR_TSENS_CTRL, pub sar_tsens_ctrl2: SAR_TSENS_CTRL2, pub sar_i2c_ctrl: SAR_I2C_CTRL, pub sar_touch_conf: SAR_TOUCH_CONF, pub sar_touch_thres1: SAR_TOUCH_THRES1, pub sar_touch_thres2: SAR_TOUCH_THRES2, pub sar_touch_thres3: SAR_TOUCH_THRES3, pub sar_touch_thres4: SAR_TOUCH_THRES4, pub sar_touch_thres5: SAR_TOUCH_THRES5, pub sar_touch_thres6: SAR_TOUCH_THRES6, pub sar_touch_thres7: SAR_TOUCH_THRES7, pub sar_touch_thres8: SAR_TOUCH_THRES8, pub sar_touch_thres9: SAR_TOUCH_THRES9, pub sar_touch_thres10: SAR_TOUCH_THRES10, pub sar_touch_thres11: SAR_TOUCH_THRES11, pub sar_touch_thres12: SAR_TOUCH_THRES12, pub sar_touch_thres13: SAR_TOUCH_THRES13, pub sar_touch_thres14: SAR_TOUCH_THRES14, pub sar_touch_chn_st: SAR_TOUCH_CHN_ST, pub sar_touch_status0: SAR_TOUCH_STATUS0, pub sar_touch_status1: SAR_TOUCH_STATUS1, pub sar_touch_status2: SAR_TOUCH_STATUS2, pub sar_touch_status3: SAR_TOUCH_STATUS3, pub sar_touch_status4: SAR_TOUCH_STATUS4, pub sar_touch_status5: SAR_TOUCH_STATUS5, pub sar_touch_status6: SAR_TOUCH_STATUS6, pub sar_touch_status7: SAR_TOUCH_STATUS7, pub sar_touch_status8: SAR_TOUCH_STATUS8, pub sar_touch_status9: SAR_TOUCH_STATUS9, pub sar_touch_status10: SAR_TOUCH_STATUS10, pub sar_touch_status11: SAR_TOUCH_STATUS11, pub sar_touch_status12: SAR_TOUCH_STATUS12, pub sar_touch_status13: SAR_TOUCH_STATUS13, pub sar_touch_status14: SAR_TOUCH_STATUS14, pub sar_touch_status15: SAR_TOUCH_STATUS15, pub sar_touch_status16: SAR_TOUCH_STATUS16, pub sar_dac_ctrl1: SAR_DAC_CTRL1, pub sar_dac_ctrl2: SAR_DAC_CTRL2, pub sar_cocpu_state: SAR_COCPU_STATE, pub sar_cocpu_int_raw: SAR_COCPU_INT_RAW, pub sar_cocpu_int_ena: SAR_COCPU_INT_ENA, pub sar_cocpu_int_st: SAR_COCPU_INT_ST, pub sar_cocpu_int_clr: SAR_COCPU_INT_CLR, pub sar_cocpu_debug: SAR_COCPU_DEBUG, pub sar_hall_ctrl: SAR_HALL_CTRL, pub sar_nouse: SAR_NOUSE, pub sar_io_mux_conf: SAR_IO_MUX_CONF, pub sardate: SARDATE, /* private fields */
}
Expand description

Register block

Fields

sar_reader1_ctrl: SAR_READER1_CTRL

0x00 - RTC ADC1 data and sampling control

sar_reader1_status: SAR_READER1_STATUS

0x04 - saradc1 status for debug

sar_meas1_ctrl1: SAR_MEAS1_CTRL1

0x08 - Configure RTC ADC1 controller

sar_meas1_ctrl2: SAR_MEAS1_CTRL2

0x0c - Control RTC ADC1 conversion and status

sar_meas1_mux: SAR_MEAS1_MUX

0x10 - Select the controller for SAR ADC1

sar_atten1: SAR_ATTEN1

0x14 - Configure SAR ADC1 attenuation

sar_amp_ctrl1: SAR_AMP_CTRL1

0x18 - AMP control

sar_amp_ctrl2: SAR_AMP_CTRL2

0x1c - AMP control

sar_amp_ctrl3: SAR_AMP_CTRL3

0x20 - AMP control register

sar_reader2_ctrl: SAR_READER2_CTRL

0x24 - RTC ADC2 data and sampling control

sar_reader2_status: SAR_READER2_STATUS

0x28 - saradc2 status for debug

sar_meas2_ctrl1: SAR_MEAS2_CTRL1

0x2c - configure rtc saradc2

sar_meas2_ctrl2: SAR_MEAS2_CTRL2

0x30 - Control RTC ADC2 conversion and status

sar_meas2_mux: SAR_MEAS2_MUX

0x34 - Select the controller for SAR ADC2

sar_atten2: SAR_ATTEN2

0x38 - Configure SAR ADC2 attenuation

sar_power_xpd_sar: SAR_POWER_XPD_SAR

0x3c - configure saradc’s power by sw

sar_slave_addr1: SAR_SLAVE_ADDR1

0x40 - Configure slave addresses 0-1 of RTC I2C

sar_slave_addr2: SAR_SLAVE_ADDR2

0x44 - Configure slave addresses 2-3 of RTC I2C

sar_slave_addr3: SAR_SLAVE_ADDR3

0x48 - Configure slave addresses 4-5 of RTC I2C

sar_slave_addr4: SAR_SLAVE_ADDR4

0x4c - Configure slave addresses 6-7 of RTC I2C

sar_tsens_ctrl: SAR_TSENS_CTRL

0x50 - Temperature sensor data control

sar_tsens_ctrl2: SAR_TSENS_CTRL2

0x54 - Temperature sensor control

sar_i2c_ctrl: SAR_I2C_CTRL

0x58 - Configure RTC I2C transmission

sar_touch_conf: SAR_TOUCH_CONF

0x5c - Touch sensor configuration register

sar_touch_thres1: SAR_TOUCH_THRES1

0x60 - Finger threshold for touch pad 1

sar_touch_thres2: SAR_TOUCH_THRES2

0x64 - Finger threshold for touch pad 2

sar_touch_thres3: SAR_TOUCH_THRES3

0x68 - Finger threshold for touch pad 3

sar_touch_thres4: SAR_TOUCH_THRES4

0x6c - Finger threshold for touch pad 4

sar_touch_thres5: SAR_TOUCH_THRES5

0x70 - Finger threshold for touch pad 5

sar_touch_thres6: SAR_TOUCH_THRES6

0x74 - Finger threshold for touch pad 6

sar_touch_thres7: SAR_TOUCH_THRES7

0x78 - Finger threshold for touch pad 7

sar_touch_thres8: SAR_TOUCH_THRES8

0x7c - Finger threshold for touch pad 8

sar_touch_thres9: SAR_TOUCH_THRES9

0x80 - Finger threshold for touch pad 9

sar_touch_thres10: SAR_TOUCH_THRES10

0x84 - Finger threshold for touch pad 10

sar_touch_thres11: SAR_TOUCH_THRES11

0x88 - Finger threshold for touch pad 11

sar_touch_thres12: SAR_TOUCH_THRES12

0x8c - Finger threshold for touch pad 12

sar_touch_thres13: SAR_TOUCH_THRES13

0x90 - Finger threshold for touch pad 13

sar_touch_thres14: SAR_TOUCH_THRES14

0x94 - Finger threshold for touch pad 14

sar_touch_chn_st: SAR_TOUCH_CHN_ST

0xd4 - Touch channel status register

sar_touch_status0: SAR_TOUCH_STATUS0

0xd8 - Status of touch controller

sar_touch_status1: SAR_TOUCH_STATUS1

0xdc - Touch pad 1 status

sar_touch_status2: SAR_TOUCH_STATUS2

0xe0 - Touch pad 2 status

sar_touch_status3: SAR_TOUCH_STATUS3

0xe4 - Touch pad 3 status

sar_touch_status4: SAR_TOUCH_STATUS4

0xe8 - Touch pad 4 status

sar_touch_status5: SAR_TOUCH_STATUS5

0xec - Touch pad 5 status

sar_touch_status6: SAR_TOUCH_STATUS6

0xf0 - Touch pad 6 status

sar_touch_status7: SAR_TOUCH_STATUS7

0xf4 - Touch pad 7 status

sar_touch_status8: SAR_TOUCH_STATUS8

0xf8 - Touch pad 8 status

sar_touch_status9: SAR_TOUCH_STATUS9

0xfc - Touch pad 9 status

sar_touch_status10: SAR_TOUCH_STATUS10

0x100 - Touch pad 10 status

sar_touch_status11: SAR_TOUCH_STATUS11

0x104 - Touch pad 11 status

sar_touch_status12: SAR_TOUCH_STATUS12

0x108 - Touch pad 12 status

sar_touch_status13: SAR_TOUCH_STATUS13

0x10c - Touch pad 13 status

sar_touch_status14: SAR_TOUCH_STATUS14

0x110 - Touch pad 14 status

sar_touch_status15: SAR_TOUCH_STATUS15

0x114 - Touch sleep pad status

sar_touch_status16: SAR_TOUCH_STATUS16

0x118 - Touch approach count status

sar_dac_ctrl1: SAR_DAC_CTRL1

0x11c - DAC control

sar_dac_ctrl2: SAR_DAC_CTRL2

0x120 - DAC output control

sar_cocpu_state: SAR_COCPU_STATE

0x124 - ULP-RISCV status

sar_cocpu_int_raw: SAR_COCPU_INT_RAW

0x128 - Interrupt raw bit of ULP-RISCV

sar_cocpu_int_ena: SAR_COCPU_INT_ENA

0x12c - Interrupt enable bit of ULP-RISCV

sar_cocpu_int_st: SAR_COCPU_INT_ST

0x130 - Interrupt status bit of ULP-RISCV

sar_cocpu_int_clr: SAR_COCPU_INT_CLR

0x134 - Interrupt clear bit of ULP-RISCV

sar_cocpu_debug: SAR_COCPU_DEBUG

0x138 - ULP-RISCV debug register

sar_hall_ctrl: SAR_HALL_CTRL

0x13c - hall control

sar_nouse: SAR_NOUSE

0x140 - sar nouse

sar_io_mux_conf: SAR_IO_MUX_CONF

0x144 - Configure and reset IO MUX

sardate: SARDATE

0x148 - Version Control Register

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