pub struct W(_);
Expand description
Register CONF1
writer
Implementations
sourceimpl W
impl W
sourcepub fn check_sum_en(&mut self) -> CHECK_SUM_EN_W<'_, 0>
pub fn check_sum_en(&mut self) -> CHECK_SUM_EN_W<'_, 0>
Bit 0 - This is the enable bit to check header checksum when UHCI receives a data packet.
sourcepub fn check_seq_en(&mut self) -> CHECK_SEQ_EN_W<'_, 1>
pub fn check_seq_en(&mut self) -> CHECK_SEQ_EN_W<'_, 1>
Bit 1 - This is the enable bit to check sequence number when UHCI receives a data packet.
sourcepub fn crc_disable(&mut self) -> CRC_DISABLE_W<'_, 2>
pub fn crc_disable(&mut self) -> CRC_DISABLE_W<'_, 2>
Bit 2 - Set this bit to support CRC calculation. Data Integrity check present bit in UHCI packet frame should be 1.
sourcepub fn save_head(&mut self) -> SAVE_HEAD_W<'_, 3>
pub fn save_head(&mut self) -> SAVE_HEAD_W<'_, 3>
Bit 3 - Set this bit to save the packet header when UHCI receives a data packet.
sourcepub fn tx_check_sum_re(&mut self) -> TX_CHECK_SUM_RE_W<'_, 4>
pub fn tx_check_sum_re(&mut self) -> TX_CHECK_SUM_RE_W<'_, 4>
Bit 4 - Set this bit to encode the data packet with a checksum.
sourcepub fn tx_ack_num_re(&mut self) -> TX_ACK_NUM_RE_W<'_, 5>
pub fn tx_ack_num_re(&mut self) -> TX_ACK_NUM_RE_W<'_, 5>
Bit 5 - Set this bit to encode the data packet with an acknowledgement when a reliable packet is to be transmit.
sourcepub fn check_owner(&mut self) -> CHECK_OWNER_W<'_, 6>
pub fn check_owner(&mut self) -> CHECK_OWNER_W<'_, 6>
Bit 6 - 1: Check the link list descriptor when link list owner is DMA controller; 0: Always check link list descriptor.
sourcepub fn wait_sw_start(&mut self) -> WAIT_SW_START_W<'_, 7>
pub fn wait_sw_start(&mut self) -> WAIT_SW_START_W<'_, 7>
Bit 7 - The UHCI encoder will jump to ST_SW_WAIT status if this register is set to 1.
sourcepub fn sw_start(&mut self) -> SW_START_W<'_, 8>
pub fn sw_start(&mut self) -> SW_START_W<'_, 8>
Bit 8 - If current UHCI_ENCODE_STATE is ST_SW_WAIT, the UHCI will start to send data packet out when this bit is set to 1.
sourcepub fn dma_infifo_full_thrs(&mut self) -> DMA_INFIFO_FULL_THRS_W<'_, 9>
pub fn dma_infifo_full_thrs(&mut self) -> DMA_INFIFO_FULL_THRS_W<'_, 9>
Bits 9:20 - This field is used to generate the UHCI_DMA_INFIFO_FULL_WM_INT interrupt when the counter value of DMA RX FIFO exceeds the value of the register.