Struct esp32s2::rmt::chconf1::W

pub struct W(_);

Register CH%sCONF1 writer

Implementations

impl W

pub fn tx_start(&mut self) -> TX_START_W<'_, 0>

Bit 0 - Set this bit to start sending data on CHANNEL%s.

pub fn rx_en(&mut self) -> RX_EN_W<'_, 1>

Bit 1 - Set this bit to enable receiver to receive data on CHANNEL%s.

pub fn mem_wr_rst(&mut self) -> MEM_WR_RST_W<'_, 2>

Bit 2 - Set this bit to reset write ram address for CHANNEL%s by accessing receiver.

pub fn mem_rd_rst(&mut self) -> MEM_RD_RST_W<'_, 3>

Bit 3 - Set this bit to reset read ram address for CHANNEL%s by accessing transmitter.

pub fn apb_mem_rst(&mut self) -> APB_MEM_RST_W<'_, 4>

Bit 4 - Set this bit to reset W/R ram address for CHANNEL%s by accessing apb fifo.

pub fn mem_owner(&mut self) -> MEM_OWNER_W<'_, 5>

Bit 5 - This register marks the ownership of CHANNEL%s’s ram block. 1’h1: Receiver is using the ram. 1’h0: Transmitter is using the ram.

pub fn tx_conti_mode(&mut self) -> TX_CONTI_MODE_W<'_, 6>

Bit 6 - Set this bit to restart transmission from the first data to the last data in CHANNEL%s.

pub fn rx_filter_en(&mut self) -> RX_FILTER_EN_W<'_, 7>

Bit 7 - This is the receive filter’s enable bit for CHANNEL%s.

pub fn rx_filter_thres(&mut self) -> RX_FILTER_THRES_W<'_, 8>

Bits 8:15 - Ignores the input pulse when its width is smaller than this register value in APB clock periods (in receive mode).

pub fn chk_rx_carrier_en(&mut self) -> CHK_RX_CARRIER_EN_W<'_, 16>

Bit 16 - Set this bit to enable memory loop read mode when carrier modulation is enabled for channel %s.

pub fn ref_always_on(&mut self) -> REF_ALWAYS_ON_W<'_, 17>

Bit 17 - This bit is used to select the base clock for CHANNEL%s. 1’h1: clk_apb 1’h0:clk_ref

pub fn idle_out_lv(&mut self) -> IDLE_OUT_LV_W<'_, 18>

Bit 18 - This bit configures the level of output signal in CHANNEL%s when the latter is in IDLE state.

pub fn idle_out_en(&mut self) -> IDLE_OUT_EN_W<'_, 19>

Bit 19 - This is the output enable-control bit for CHANNEL%s in IDLE state.

pub fn tx_stop(&mut self) -> TX_STOP_W<'_, 20>

Bit 20 - Set this bit to stop the transmitter of CHANNEL%s sending data out.

pub unsafe fn bits(&mut self, bits: u32) -> &mut Self

Writes raw bits to the register.

Methods from Deref<Target = W<CHCONF1_SPEC>>

pub unsafe fn bits(&mut self, bits: REG::Ux) -> &mut Self

Writes raw bits to the register.

Safety

Read datasheet or reference manual to find what values are allowed to pass.

Trait Implementations

impl Deref for W

type Target = W<CHCONF1_SPEC>

The resulting type after dereferencing.

fn deref(&self) -> &Self::Target

Dereferences the value.

impl DerefMut for W

fn deref_mut(&mut self) -> &mut Self::Target

Mutably dereferences the value.

impl From<W<CHCONF1_SPEC>> for W

fn from(writer: W<CHCONF1_SPEC>) -> Self

Converts to this type from the input type.