Struct esp32s2::spi0::dma_conf::R

pub struct R(_);

Register DMA_CONF reader

Implementations

impl R

pub fn in_rst(&self) -> IN_RST_R

Bit 2 - The bit is used to reset in dma fsm and in data fifo pointer.

pub fn out_rst(&self) -> OUT_RST_R

Bit 3 - The bit is used to reset out dma fsm and out data fifo pointer.

pub fn ahbm_fifo_rst(&self) -> AHBM_FIFO_RST_R

Bit 4 - Reset spi dma ahb master fifo pointer.

pub fn ahbm_rst(&self) -> AHBM_RST_R

Bit 5 - Reset spi dma ahb master.

pub fn in_loop_test(&self) -> IN_LOOP_TEST_R

Bit 6 - Set bit to test in link.

pub fn out_loop_test(&self) -> OUT_LOOP_TEST_R

Bit 7 - Set bit to test out link.

pub fn out_auto_wrback(&self) -> OUT_AUTO_WRBACK_R

Bit 8 - when the bit is set, DMA continue to use the next inlink node when the length of inlink is 0.

pub fn out_eof_mode(&self) -> OUT_EOF_MODE_R

Bit 9 - out eof flag generation mode . 1: when dma pop all data from fifo 0:when ahb push all data to fifo.

pub fn outdscr_burst_en(&self) -> OUTDSCR_BURST_EN_R

Bit 10 - read descriptor use burst mode when read data for memory.

pub fn indscr_burst_en(&self) -> INDSCR_BURST_EN_R

Bit 11 - read descriptor use burst mode when write data to memory.

pub fn out_data_burst_en(&self) -> OUT_DATA_BURST_EN_R

Bit 12 - spi dma read data from memory in burst mode.

pub fn mem_trans_en(&self) -> MEM_TRANS_EN_R

Bit 13 - 1: Internal memory data transfer enable bit. Send SPI DMA RX buffer data to SPI DMA TX buffer. 0: Disable this function.

pub fn dma_rx_stop(&self) -> DMA_RX_STOP_R

Bit 14 - spi dma read data stop when in continue tx/rx mode.

pub fn dma_tx_stop(&self) -> DMA_TX_STOP_R

Bit 15 - spi dma write data stop when in continue tx/rx mode.

pub fn dma_continue(&self) -> DMA_CONTINUE_R

Bit 16 - spi dma continue tx/rx data.

pub fn slv_last_seg_pop_clr(&self) -> SLV_LAST_SEG_POP_CLR_R

Bit 17 - 1: Clear spi_slv_seg_frt_pop_mask. 0 : others

pub fn dma_slv_seg_trans_en(&self) -> DMA_SLV_SEG_TRANS_EN_R

Bit 18 - Enable dma segment transfer in spi dma half slave mode. 1: enable. 0: disable.

pub fn slv_rx_seg_trans_clr_en(&self) -> SLV_RX_SEG_TRANS_CLR_EN_R

Bit 19 - 1: spi_dma_infifo_full_vld is cleared by spi slave CMD5. 0: spi_dma_infifo_full_vld is cleared by SPI_TRANS_DONE.

pub fn slv_tx_seg_trans_clr_en(&self) -> SLV_TX_SEG_TRANS_CLR_EN_R

Bit 20 - 1: spi_dma_outfifo_empty_vld is cleared by spi slave CMD6. 0: spi_dma_outfifo_empty_vld is cleared by SPI_TRANS_DONE.

pub fn rx_eof_en(&self) -> RX_EOF_EN_R

Bit 21 - 1: SPI_IN_SUC_EOF_INT_RAW is set when the number of dma pushed data bytes is equal to the value of SPI_SLV_DMA_RD_BYTELEN[19:0]/ SPI_MST_DMA_RD_BYTELEN[19:0] in spi dma transition. 0: SPI_IN_SUC_EOF_INT_RAW is set by SPI_TRANS_DONE in non-seg-trans or SPI_DMA_SEG_TRANS_DONE in seg-trans.

pub fn dma_infifo_full_clr(&self) -> DMA_INFIFO_FULL_CLR_R

Bit 22 - 1:Clear spi_dma_infifo_full_vld. 0: Do not control it.

pub fn dma_outfifo_empty_clr(&self) -> DMA_OUTFIFO_EMPTY_CLR_R

Bit 23 - 1:Clear spi_dma_outfifo_empty_vld. 0: Do not control it.

pub fn ext_mem_bk_size(&self) -> EXT_MEM_BK_SIZE_R

Bits 26:27 - Select the external memory block size.

pub fn dma_seg_trans_clr(&self) -> DMA_SEG_TRANS_CLR_R

Bit 28 - 1: End slave seg-trans, which acts as 0x05 command. 2 or more end seg-trans signals will induce error in DMA RX. 0: others. Will be cleared in 1 APB CLK cycles by hardware..

Methods from Deref<Target = R<DMA_CONF_SPEC>>

pub fn bits(&self) -> REG::Ux

Reads raw bits from register.

Trait Implementations

impl Deref for R

type Target = R<DMA_CONF_SPEC>

The resulting type after dereferencing.

fn deref(&self) -> &Self::Target

Dereferences the value.

impl From<R<DMA_CONF_SPEC>> for R

fn from(reader: R<DMA_CONF_SPEC>) -> Self

Converts to this type from the input type.