Expand description
UHCI configuration register
Structs
Type Definitions
Field AHBM_FIFO_RST reader - Set this bit to reset AHB interface cmdFIFO of DMA.
Field AHBM_FIFO_RST writer - Set this bit to reset AHB interface cmdFIFO of DMA.
Field AHBM_RST reader - Set this bit to reset AHB interface of DMA.
Field AHBM_RST writer - Set this bit to reset AHB interface of DMA.
Field CLK_EN reader - 1: Force clock on for registers. 0: Support clock only when application writes registers.
Field CLK_EN writer - 1: Force clock on for registers. 0: Support clock only when application writes registers.
Field CRC_REC_EN reader - Set this bit to enable UHCI to receive the 16 bit CRC.
Field CRC_REC_EN writer - Set this bit to enable UHCI to receive the 16 bit CRC.
Field ENCODE_CRC_EN reader - Set this bit to enable data integrity checking by appending a 16 bit CCITT-CRC to the end of the payload.
Field ENCODE_CRC_EN writer - Set this bit to enable data integrity checking by appending a 16 bit CCITT-CRC to the end of the payload.
Field HEAD_EN reader - Set this bit to encode the data packet with a formatting header.
Field HEAD_EN writer - Set this bit to encode the data packet with a formatting header.
Field INDSCR_BURST_EN reader - This register is used to specify DMA receive descriptor transfer mode. 1: burst mode. 0: byte mode.
Field INDSCR_BURST_EN writer - This register is used to specify DMA receive descriptor transfer mode. 1: burst mode. 0: byte mode.
Field IN_LOOP_TEST reader - Reserved.
Field IN_LOOP_TEST writer - Reserved.
Field IN_RST reader - Set this bit to reset in DMA FSM.
Field IN_RST writer - Set this bit to reset in DMA FSM.
Field LEN_EOF_EN reader - If this bit is set to 1, UHCI decoder stops receiving payload data when the number of received data bytes has reached the specified value. The value is payload length indicated by UCHI packet header when UHCI_HEAD_EN is 1 or the value is a configuration value when UHCI_HEAD_EN is 0. If this bit is set to 0, UHCI decoder stops receiving payload data upon receiving 0xC0.
Field LEN_EOF_EN writer - If this bit is set to 1, UHCI decoder stops receiving payload data when the number of received data bytes has reached the specified value. The value is payload length indicated by UCHI packet header when UHCI_HEAD_EN is 1 or the value is a configuration value when UHCI_HEAD_EN is 0. If this bit is set to 0, UHCI decoder stops receiving payload data upon receiving 0xC0.
Field MEM_TRANS_EN reader - 1: UHCI transmitted data would be write back into DMA INFIFO.
Field MEM_TRANS_EN writer - 1: UHCI transmitted data would be write back into DMA INFIFO.
Field OUTDSCR_BURST_EN reader - This register is used to specify DMA transmit descriptor transfer mode. 1: burst mode. 0: byte mode.
Field OUTDSCR_BURST_EN writer - This register is used to specify DMA transmit descriptor transfer mode. 1: burst mode. 0: byte mode.
Field OUT_AUTO_WRBACK reader - Set this bit to enable automatic outlink writeback when all the data in TX FIFO has been transmitted.
Field OUT_AUTO_WRBACK writer - Set this bit to enable automatic outlink writeback when all the data in TX FIFO has been transmitted.
Field OUT_EOF_MODE reader - This register is used to specify the generation mode of UHCI_OUT_EOF_INT interrupt. 1: When DMA has popped all data from FIFO. 0: When AHB has pushed all data to FIFO.
Field OUT_EOF_MODE writer - This register is used to specify the generation mode of UHCI_OUT_EOF_INT interrupt. 1: When DMA has popped all data from FIFO. 0: When AHB has pushed all data to FIFO.
Field OUT_LOOP_TEST reader - Reserved.
Field OUT_LOOP_TEST writer - Reserved.
Field OUT_NO_RESTART_CLR reader - Reserved.
Field OUT_NO_RESTART_CLR writer - Reserved.
Field OUT_RST reader - Set this bit to reset out DMA FSM.
Field OUT_RST writer - Set this bit to reset out DMA FSM.
Field SEPER_EN reader - Set this bit to separate the data frame using a special character.
Field SEPER_EN writer - Set this bit to separate the data frame using a special character.
Field UART0_CE reader - Set this bit to link up UHCI and UART0.
Field UART0_CE writer - Set this bit to link up UHCI and UART0.
Field UART1_CE reader - Set this bit to link up UHCI and UART1.
Field UART1_CE writer - Set this bit to link up UHCI and UART1.
Field UART_IDLE_EOF_EN reader - If this bit is set to 1, UHCI will end the payload receiving process when UART has been in idle state.
Field UART_IDLE_EOF_EN writer - If this bit is set to 1, UHCI will end the payload receiving process when UART has been in idle state.
Field UART_RX_BRK_EOF_EN reader - If this bit is set to 1, UHCI stops receiving payload data when a NULL frame is received by UART.
Field UART_RX_BRK_EOF_EN writer - If this bit is set to 1, UHCI stops receiving payload data when a NULL frame is received by UART.