Module esp32s2::dedicated_gpio::intr_st

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Expand description

Masked interrupt status

Structs

INTR_ST_SPEC

Masked interrupt status

R

Register INTR_ST reader

Type Definitions

GPIO0_INT_ST_R

Field GPIO0_INT_ST reader - This is the status bit for DEDIC_GPIO0_INT_RAW when DEDIC_GPIO7_INT_ENA is set to 1.

GPIO1_INT_ST_R

Field GPIO1_INT_ST reader - This is the status bit for DEDIC_GPIO1_INT_RAW when DEDIC_GPIO7_INT_ENA is set to 1.

GPIO2_INT_ST_R

Field GPIO2_INT_ST reader - This is the status bit for DEDIC_GPIO2_INT_RAW when DEDIC_GPIO7_INT_ENA is set to 1.

GPIO3_INT_ST_R

Field GPIO3_INT_ST reader - This is the status bit for DEDIC_GPIO3_INT_RAW when DEDIC_GPIO7_INT_ENA is set to 1.

GPIO4_INT_ST_R

Field GPIO4_INT_ST reader - This is the status bit for DEDIC_GPIO4_INT_RAW when DEDIC_GPIO7_INT_ENA is set to 1.

GPIO5_INT_ST_R

Field GPIO5_INT_ST reader - This is the status bit for DEDIC_GPIO5_INT_RAW when DEDIC_GPIO7_INT_ENA is set to 1.

GPIO6_INT_ST_R

Field GPIO6_INT_ST reader - This is the status bit for DEDIC_GPIO6_INT_RAW when DEDIC_GPIO7_INT_ENA is set to 1.

GPIO7_INT_ST_R

Field GPIO7_INT_ST reader - This is the status bit for DEDIC_GPIO7_INT_RAW when DEDIC_GPIO7_INT_ENA is set to 1.